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PostPosted: Wed Apr 02, 2014 4:57 am 
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Working to provide backwards compatibility for both ‘c02 and ‘816 modes from a 32 bit mode a way is needed to switch between modes. There exists already the byte sequences to switch between ‘c02 and ‘816 mode. But no current way to switch to a 32 bit mode. With no room in the ‘816 instruction set, a multi-byte sequence is suggested.

to get into 8 bit mode from ‘816 or ‘832 mode SEC then XCE
to get into ‘816 mode from ‘c02 or ‘832 mode CLC then XCE
to get into ‘832 mode from ‘c02 or ‘816 mode use the four byte sequence CLC,XCE,CLC then XCE again.
Note the four byte sequence CLC,XCE,CLC,XCE simply switches to 32 bit mode without actually affecting the carry bit.

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PostPosted: Wed Apr 02, 2014 5:22 am 
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Context: Is this about your RTF65002 core? How about using the WDM op code with a second byte for op code extension? Then you can get the whole thing in two clock cycles (if your design still has a two-clock minimum-- which I don't know if it does).

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PostPosted: Wed Apr 02, 2014 8:41 am 
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It seems that the Terbium was going to use the overflow bit to swap into the 32-bit mode bit (E16). We don't know what the opcode sequence would have been, but it's tempting to use XCE in 16-bit mode to swap the V bit. Perhaps even have XCE in 8-bit mode clear the overflow bit, for a little extra safety. It's not 100% backward compatible, unfortunately - it's conceivable that existing code makes use of V during mode swaps.
(Edit: here's the PDF http://www.obelisk.demon.co.uk/files/W65C832.pdf )


Last edited by BigEd on Wed Apr 02, 2014 4:39 pm, edited 1 time in total.

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PostPosted: Wed Apr 02, 2014 3:30 pm 
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GARTHWILSON wrote:
How about using the WDM op code with a second byte for op code extension?

It's one option, but it might make the processor incompatible with future versions from WDC if they decide to use the opcodes for something else.

GARTHWILSON wrote:
(if your design still has a two-clock minimum

Yes, it's a two cycle minimum.

BigEd wrote:
Perhaps even have XCE in 8-bit mode clear the overflow bit,

I wonder if the overflow flag should be set appropriately even with existing '816 code in order to be upwards compatible with a Terbium. This is a pain because there is no 'set overflow' instruction. Assuming something like CLV,CLC,XCE would throw the processor into 32 bit mode.

BigEd wrote:
It's not 100% backward compatible, unfortunately - it's conceivable that existing code makes use of V during mode swaps.

If the cpu just recognized the byte sequence without actually executing it, it might break less code. So CLV followed by XCE doesn't actually clear the overflow. It's a bit like a magic spell.

Another idea is to hijack the jump instruction, and use jumping to specific addresses to cause mode switches. Eg. JMP $FFFFFF switches to 32 bits, JMP $FFFFFE switches to 16 bits, all without actually performing the JMP.

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PostPosted: Wed Apr 02, 2014 4:58 pm 
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How about a sequence of bytes that switches to '02, then use an unused opcode (specific!) from the '02 set? Is that possible?


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PostPosted: Wed Apr 02, 2014 6:42 pm 
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I'd use WDM, as it effectively is a NOP in the '816.

I may be walking way, way, way out on a limb here, but I don't think any more microprocessor designs are going to be forthcoming from WDC. Bill Mensch is 68 years old and is most likely inclined to start ramping back and slowly easing into retirement. I may be wrong, but since I'm older than he is by about 7 months I have a little bit of perspective here. :lol: Hence WDM is probably never going to be used for anything.

Of course, I'd love to be proven wrong and see the 65C832 come to fruition. Or, even better, a 65xx-compatible math co-processor...followed by a 65xx-compatible DMA controller...followed by... :lol: WDC is releasing some new development hardware, so it's evident that someone there is concocting new stuff.

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PostPosted: Wed Apr 02, 2014 7:07 pm 
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Just to be clear, WDM isn't just a NOP, it takes an argument byte just like BRK. (You probably know that BDD!)


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PostPosted: Wed Apr 02, 2014 8:04 pm 
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I, too, doubt WDC will be introducing any more processors. It looks like any ideas for expansion into new areas now are in development boards and tools, probably not actual processors. I think the future 65-family processors will come from the HDL enthusiasts.

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Quote:
(if your design still has a two-clock minimum
Yes, it's a two cycle minimum.
I've been somewhat avoiding the word "cycle" because those who come in being accustomed to other processors might think of a "cycle" as four or more clock pulses. Microchip brags about "single-cycle execution" when they really mean most instructions take four cycles in the way we think of them. I think the Z80 called them "T states."

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PostPosted: Wed Apr 02, 2014 9:24 pm 
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Quote:
(if your design still has a two-clock minimum
Quote:
Yes, it's a two cycle minimum
Quote:
I've been somewhat avoiding the word "cycle" because those who come in being accustomed to other processors might think of a "cycle" as four or more clock pulses. Microchip brags about "single-cycle execution" when they really mean most instructions take four cycles in the way we think of them. I think the Z80 called them "T states."


I should know better. That was definitely 2 -clocks minimum. The cpu averages about 1 clock per byte processed.

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PostPosted: Wed Apr 02, 2014 10:04 pm 
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BigEd wrote:
Just to be clear, WDM isn't just a NOP, it takes an argument byte just like BRK. (You probably know that BDD!)

Just to be a bit pedantic, BRK (and COP) are "stack instructions" that alter MPU behavior and program execution, as well as double-increment PC. WDM is a true NOP that just happens to double-increment PC. BTW, WDM isn't even listed in the detail operation tables starting on page 38 in the data sheet. My own testing has confirmed that WDM does nothing except double-increment PC.

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PostPosted: Wed Apr 02, 2014 10:12 pm 
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Ah yes, COP, I forgot that. I suppose for backward compatibility, and given the ownership of the ISA, WDC could have made WDM with some specific operand byte an alias for XFE in the assembler. That still leaves 255 values for further expansion.


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PostPosted: Sat Apr 05, 2014 11:17 am 
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I may be walking way, way, way out on a limb here, but I don't think any more microprocessor designs are going to be forthcoming from WDC

This is quite off topic, but how can the company survive and actually pays it's employees without developing anything new ?

How comes they're still manufacturing and selling processors designed more than 20 years ago, without having done any other improvement to them ?


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PostPosted: Sat Apr 05, 2014 11:23 am 
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They probably license at very low cost - it's a small core, and has a track record, and of course they also have a toolchain for it. I would imagine they have been progressively losing their market share though. Which is to say, they probably can't stand still forever, but if they last until retirement and have no plan to sell the outfit as a going concern, they might as well run it as long as it lasts. Pretty much all companies close their doors, in the very long run.


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PostPosted: Sat Apr 05, 2014 7:14 pm 
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Bregalad wrote:
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I may be walking way, way, way out on a limb here, but I don't think any more microprocessor designs are going to be forthcoming from WDC

This is quite off topic, but how can the company survive and actually pays it's employees without developing anything new ?

As Ed noted, WDC's business model as a fabless semiconductor house is to license their intellectual property to companies who produce custom chips. WDC receives a royalty for each chip that is produced and sold. While the per chip royalty is small, the enormous volume of chips produced for embedded applications, such as cell phones, microwave oven controllers, etc., assures a viable income stream. This business model has sustained WDC since 1978.

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How comes they're still manufacturing and selling processors designed more than 20 years ago, without having done any other improvement to them ?

The embedded market, which is where 65xx products are most often used, isn't at all like the world of PCs. You don't need to develop something new every 15 minutes in order to remain relevant. In fact, long-term stability in an embedded microprocessor design is probably an asset—design stability means a manufacturer can amortize their engineering costs over a long period of time and over a large number of products.

Actually, the 65xx ISA is some 39 years old, and the 65C02 is some 35 years old. The 65C816 is newer—it was first sampled around 1984, but none of these products has changed much over the years. The biggest change occurred when the 65C02 and 65C816 were converted to fully static cores, which was a necessary step to make the processors suitable for low power applications, such as cell phones and implanted heart defibrillators.

Less you think the 65xx product line is antiquated, you should consider that the x86 architecture is nearly as old. The Intel 8086 was developed right around the time the 65C02 was, and the 80386, Intel's first 32-bit MPU, was developed in 1986. Everything since has been an update to the 80386 ISA.

BigEd wrote:
I would imagine they have been progressively losing their market share though. Which is to say, they probably can't stand still forever, but if they last until retirement and have no plan to sell the outfit as a going concern, they might as well run it as long as it lasts.

It may be that there is a plan for succession when Bill Mensch retires. Somehow I get the feeling that he isn't going to just liquidate the company when he decides to pack it in. If so, why hire people to design and produce the new developers' boards that are being readied for sale, not to mention the recent increase in marketing effort that has been made?

Quote:
Pretty much all companies close their doors, in the very long run.

That's generally the case, with some not lasting more than a few years (about 75-80 percent of all businesses started in the USA will shut down within five years—I suspect a similar number applies worldwide. However, some companies do last for a very long time. Case in point is Beam, Inc. here in the USA, which has been producing Kentucky bourbon since 1797 (except during the prohibition years). The company has had a plan of succession almost from the beginning, and the current master distiller, Frederick Noe III, is the seventh generation of the Beam family. Another U.S. company with great longevity is Brunswick, which has been in operation since 1845, when they started producing billiards tables.

That said, the digital products industry is still very young by comparison, so longevity is relative. WDC has been in business for 36 years, so they are a mature company by digital standards. I can't picture WDC just shutting down because Bill Mensch wants to devote more time to his golf swing, or whatever it is he does for recreation. :) Almost no one just discards their life's work like that.

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PostPosted: Sat Apr 05, 2014 10:00 pm 
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The embedded market, which is where 65xx products are most often used, isn't at all like the world of PCs

I know. However, ARM, MIPS, PowerPC, and other similar processor legacies released newer and better versions of their CPU regularly. Sure sometimes the improvements are more commercial/marketing than technical, but at least they have more than 2 model of CPU for 30 years.

Quote:
Less you think the 65xx product line is antiquated, you should consider that the x86 architecture is nearly as old.

This is absolutely not my point. I have no trouble imagining how Intel can survive pay their employees, despite their architecture being "antique". However I have trouble seeing how the WDC can survive.

Even if there is people wishing to continue releasing chips including 6502-derivated cores and that continues to pay the licence to WDC, the transistor sizes decrease so rapidly they'd have to re-engineer the core at some point, no ?
Or does they insert a core with 4um transistors where the rest of the chip is 0.9 um ?


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