I'm new to 6502, I know a tiny, tiny bit of assembly and the very basics of what most of the pins do. Basically fresh out of Ben Eater's first 6502 video, plus some messing around on my own. I might be a little early on in learning about this stuff to be wondering about something like this but how would a dual 6502 system work?

The idea I had was that they'd share ROM, but I didn't get past that. Not sure how they'd interface with each other or the ROM.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Welcome, brieee!

The simplest and most often mentioned set up is that the two devices share (almost) all of memory - RAM and ROM. That's relatively straightforward because the 6502 can be considered as using the bus (or needing to use the bus) for only half the clock cycle. There are two halves, so two CPUs can share. It's not totally straightforward - as BDD says, you could usefully do some searching and reading.

Less common is to put two CPUs into communication by sharing some kind of communication channel: could be an 8 bit port, or two VIAs, or Acorn's Tube chip, or a number of other possibilities, including dual-port RAM.

In both cases, designing and organising the software so the combination is useful is the major part of the work.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

If you're good with working out designs from schematics (or just want to learn to do that), the are various examples of commercial systems that did this reliably.

One, as BDD mentioned above, are some of the Commodore floppy drive subsystems. You might start with retroabandon/cbm:dos-1.0/ where I have collected some of the documentation and ROMs for the 2040/3040/4040 series, along with references to further sources. That's also got a start on the disassembly of the ROMs if you want to work out what's going on on the software side.

Another is the Fujitsu FM-7, which had a 6809 "main" CPU that talked to a second 6809 "sub" CPU that handled graphics and a few other things. These communicated through a 256-byte area of shared memory; the schematics are fairly clear about how all this worked. (Note that, though the processor is different, the 6502 uses essentially the same bus and timing systems that Motorola used.)

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Curt J. Sampson - github.com/0cjs