Garth, I know it's not linear, but CMOS is not TTL either. The non-linearity is very different. As I said before (and you just did too), with MOSFETS (especially tiny ones) the resistance decreases as the current they pass decreases. That means as the Vo increases the current is maintained more than would be expected for a constant resistance.

Maybe I'm not explaining things properly.

Anyway, it's almost like we are saying the same thing. As you point out, CMOS will win the race against TTL.

In this case it's all CMOS. There is no reason I can see that it should not work just fine.

I still plan to have a rigorous look at this, but some other projects have pre-empted this.

_________________
Bill

Just a thought: it might be worth double-checking that all those bypass caps are indeed across the power pins of each chip.

Sorry to ignore all your recent posts folks but I only have a few minutes to type this (Friday evening and I need to take other half out for a nice meal as a thank you/sorry for all this time I am "wasting" on this). Will reply to those posts later.

...but

I just got the Rockwell R65C02 P2 in the post. Plugged it in and tried one of my existing pre-programmed chips. Darn me if it diddn't work (it did). Well after a fashoin since much of the initialization of variables to 0 using STZ was just ignored - which is odd since my datasheet says it should be okay on that chip (hex 64 for example - zero a zero page byte). After replaceing these instructions with LDA #0 and STA instructions my interrupt driven clock is working (the bit that reads the i2c realtime clock is failing but the clock is otherwise working fine).

So, whats all that about then? Does this mean I need heavier pullup resistors on the WDC chip?

Any thoughts on the STZ? That seems very odd to me. Here is a pic of the new chip. (If is indeed new, by the way, the pins never inserted - still splayed out, etc etc).

The R65C02 is fully TTL level compliant. So, at least with that CPU there should be no issue with the TTL spec'd memory. You should not need pull-ups with it.

_________________
Bill

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

I have to say I am becoming more suspicious myself. I think it's probably a straight 6502. The photo actually doesn't do I justice - it is slightly out of focus and the printing is better than it seems - possibly a little bit too good.
Oh and eBay.
I'll do a few more tests tomorrow on the unconditional branch and test and set instructions.

Still, it has done enough to show the CMOS vs TTL thing is likely the cause of all my troubles.

Check the current draw. That is a dead giveaway. An R65C02 will draw less than 10mA. The NMOS version will draw around 65-75mA.

_________________
Bill

Okay. Time for a recap.

Firstly a few answers.


Hi Floobydust. You'll see a litte lower that it looks like I actually have it all wired fine (phew, I wasn't looking forward to having to have to own up to a simple wiring problem!). I am going to rebuild it anyway as I want to add a few things so I will


Garth/BillO
I can't say I fully understand your discussion but I am indeed using the Aliance AS6C62256. Are you saying that with the W65C02 and that memory the pull-up resistors will or won't (or might not) work?

Anyway, this "Rockwell R65C02" that I bought from eBay (that isn't one of those, I reckon its an NMOS 6502 since it draws 80mA - thanks BillO) makes things very, VERY much better. If I treat it as the NMOS part it works fully - well as much as I have tested it, which is running a memory test program for 12 hours and an interrupt driven clock ever since.

So, the current theory is that the TTL memory chip doesn't drive the CMOS WDC '02 properly seems to be true. The one fly in the ointment is that I did add pullup resistors and it didn't help hugely. Maybe I needed lower resistance ones. I used 2k2.

I really would like to get this project working using the WDC '02, so my plan is to re-build on a Twin Industries single ground plane board with sockets for pull-up resistors. I will do as floobydust suggests and add power and bypass caps first. Does anyone have any further suggestions please?

I've been using the Alliance AS6C62256 SRAM chips with WDC W65C02S processors for close to 10 years now. Right now I have 4- SBCs running. There's no issue running these memory chips with the WDC CPU. I've never used data line pull-up resistors either. Note: my 3.3V prototype system uses the SAME SRAM as it's rated down to 2.7V operation.

My older SBC-1 setup uses 74HC logic for glue:
- 74HC00
- 74HC30
- 74HC138

Memory is:
- Atmel AT28C256 EEPROM
- AllianceAS6C65526 SRAM

Processor:
- W65C02S

The I/O board uses:
- WDC65C22S
- Rockwell R65C51-P4
- Maxim MAX-238

Note that I do have some pre-production engineering samples of the W65C51 chips... one which I've had running in this board up to 10MHz.

The basic schematic is very similar to what you're using, albeit my I/O page is set at $FE00. I've yet to experience a single problem using these parts together. The fact that you continue to have the problem, points to something beyond the parts. It would seem that the biggest variable here is the physical construction and/or the IC sockets and perhaps some wire-wrap connections.

_________________
Regards, KM
https://github.com/floobydust

Thanks Kevin. I am not doubting anyone. Far from it! All I can imagine, since the Rockwell does work and the WDC does not, is as you say, something on my board is not quite right and the Rockwell part can cope with it (as the noise margins are greater?) but the WDC cannot.
I am planning this new board/build right now and will post pictures as I go along.
Thank you so much for your help

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

The problem is intriguing and yesterday was a cold and dreary day so I built up a prototype board following your schematic and layout. The schematic is as amended on 10/22/22, as suggested by floobydust. The protoboard is also a single-sided vector board. Instead of wirewrapping (I don't have wire wrap sockets), I did point-to-point soldering which is slower than wirewrapping so I only did the CPU-RAM-ROM portion first. The parts I'm using are:
7430
74AHC00
74ACT138
W65C02
KM62256
X28C256
1.8432MHz oscillator

First picture is power/ground distribution which is not great but generally adequate; 2nd picture is CPU-RAM-ROM wired; third picture is the component view. I powered it up this morning and no smoke. NOP test ran OK with current draws of about 20mA. Working on a RAM diagnostic that sending out test results like Morse code.

I can take scope pictures and test your software on this parallel prototype board.
Bill

All I can say is Good Grief!! Thank you so much! I don't really know what to say. What is your plan? What do you want me to do?

wow

I’m satisfied that RAM diagnostic is working, so I’ll wire in 6522 and 6551 to look like your setup. The idea is to emulate your design as close as possible so I can verify your test software and compare hardware signals. This is similar to building a full mock-up on ground to troubleshoot equipment in space or another planet.

I have other variety of 6502 and 6551 and different family of TTL logic; I don’t have AS6C62256, but have AS6C1008 which may have similar characteristics except 4X larger capacity.

So you try different hardware/software and probe for signals you find strange and I’ll see if I also see the same phenomenons.

Current draw when testing RAM is 45mA with 1.84Mhz CPU, but this is without 6551 or 6522. Let me add 6551 and 6522 so we can have equivalent hardware.
Bill

I finished wiring up the board. Powered it up and it is not working; memory diagnostic is failing; and I can see contention on data bus! So I thought maybe I'm duplicating the problem you experienced. However visual inspection showed a short between pin 22 (R/W) and 23 (CS2) of 65C22. Once the short is removed, it is working properly.

I'm running RAM diagnostic outputting the result over W65C51 for the last 30 minutes without errors.

I found an Atmel AT28C256 so I think my parts are very similar to yours except 7430 and KM62256. Data bus is not pulled up. Power consumption is 56mA running memory diagnostic with 1.84MHz CPU clock.

I believe your design is solid but there is an mechanical problem somewhere in your prototype. Please let me know if there are signals you want me to capture or software for me to run.
Bill