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adrianhudson
PostPosted: Wed Jan 17, 2024 9:00 pm 
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pdragon wrote:
I am using WDC65c02 also and went back to check my parts shopping basket (sourced my own in Canada rather than standard kit), and lo and behold my SRAM chip is ... AS6C62256-55PCN.
...

It seems like the ultimate solution here was to replace the SRAM with one from a different manufacturer?

I am parenoid about that AS6C62256-55PCN! Change it for a different manufacturer. I know it's not logical but my board has been running a year now(full time) no crashes. It won't cost much and just might save you hours and hours.
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BigDumbDinosaur
PostPosted: Wed Jan 17, 2024 9:58 pm 
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BigEd wrote:
Lots of possibilities, but my first question would be about bypass caps...

Yep!

From what I can see, a bypass capacitor would die of sheer loneliness on that board.  :D  Bypass capacitors in digital work are not an option, even on four-or-more-layer PCBs.  Each active device should have a 0.1 µF MLCC X7R capacitor mounted as physically close to the VCC pin as possible and with the shortest leads possible.  Also, a large, low-ESR electrolytic capacitor on the board near where VCC is applied is a good idea.  Give that a try and see if stability improves.

Lastly, while a CMOS device’s output can drive a TTL device’s input without any issues, the reverse is not true.  In general, you should not use 74LS devices in an otherwise all-CMOS design.  If you must drive a CMOS input from an LS output, use a CMOS device with TTL-compatible inputs, e.g., a 74HCT instead of 74HC.

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pdragon
PostPosted: Thu Jan 18, 2024 12:33 am 
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Thank you, lots of ideas to experiment with. Will report back.
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BillO
PostPosted: Thu Jan 18, 2024 3:08 pm 
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BigDumbDinosaur wrote:
[color=#000000]
BigEd wrote:
Lots of possibilities, but my first question would be about bypass caps...

Yep!

From what I can see, a bypass capacitor would die of sheer loneliness on that board.  :D


Well, there is two of them :roll: :mrgreen:

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gfoot
PostPosted: Thu Jan 18, 2024 3:41 pm 
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BigDumbDinosaur wrote:
Lastly, while a CMOS device’s output can drive a TTL device’s input without any issues, the reverse is not true.  In general, you should not use 74LS devices in an otherwise all-CMOS design.  If you must drive a CMOS input from an LS output, use a CMOS device with TTL-compatible inputs, e.g., a 74HCT instead of 74HC.

Yes just to plus on this, it sounds like a 74LS157 in the clock module is directly driving - among other things - a 74HC00, and probably also the 65C02 itself, and while it might work a bit, it is out of spec and worth avoiding. You can use a 74HCT00 instead, but the 65C02 also needs consideration, so you really need either a 74HC157 or a 74HCT157 in the clock module.
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BigDumbDinosaur
PostPosted: Thu Jan 18, 2024 4:21 pm 
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BillO wrote:
BigDumbDinosaur wrote:
From what I can see, a bypass capacitor would die of sheer loneliness on that board.  :D

Well, there is two of them :roll: :mrgreen:

Well, those two had better get together and start a family of bypass caps.  :D

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BigDumbDinosaur
PostPosted: Thu Jan 18, 2024 4:25 pm 
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gfoot wrote:
BigDumbDinosaur wrote:
Lastly, while a CMOS device’s output can drive a TTL device’s input without any issues, the reverse is not true.  In general, you should not use 74LS devices in an otherwise all-CMOS design.  If you must drive a CMOS input from an LS output, use a CMOS device with TTL-compatible inputs, e.g., a 74HCT instead of 74HC.

Yes just to plus on this...You can use a 74HCT00 instead, but the 65C02 also needs consideration, so you really need either a 74HC157 or a 74HCT157 in the clock module.

The 65C02 should be driven from a 74AC device in order to satisfy its clock specs.  In particular, Ø2 rise and fall times should not exceed 5ns.  A 74HC device *might* meet that spec, but that’s typically not guaranteed.

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Michael
PostPosted: Thu Jan 18, 2024 10:58 pm 
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If you have an Arduino Uno or Nano handy you could use it temporarily as a CPU clock in order to test that part of the circuit. Use one of the timers to generate a 1, 2, 4, or 8-MHz (50% duty cycle) clock as a background task on the Arduino (excerpt below).

Regards...

Code:
 /***************************************************************************
  *  output 4-MHz clock on OC2A (D11/PB3) for sound chip demo'              *
  ***************************************************************************/
  void beginClock()
  { pinMode(11,OUTPUT);             // OC2A (D11/PB3)
 /*                                                                         *
  *  TCCR2A settings for 'normal' or 'CTC' (non-PWM) mode                   *
  *  ------------------------------------------------------------           *
  *  COM2A1:COM2A0 '01' - Toggle OC2A on Compare Match                      *
  *  WGM22:WGM20  '010' - CTC mode (clear timer on compare match)           *
  *                       (WGM22 bit is in TCCR2B register)                 *
  *                                                                         */
    TCCR2A = ((1 << WGM21) | (1 << COM2A0));
    TCCR2B = (1 << CS20);           // prescale = 1:1 (WGM22 = 0)
    TIMSK2 = 0;                     // no interrupts
    OCR2A = 1;                      // match value
  }                                 // 0/1/3/7 => 8/4/2/1 MHz
 /***************************************************************************/
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plasmo
PostPosted: Fri Jan 19, 2024 7:10 pm 
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I decided to take another look at AS6C62256. I have a barebone 6502 SBC in pc board which should be more reproducible in case of errors. I do have to make small modification to accommodate 32Kx8 RAM. AS6C62256 is rated 55nS, so it should work with 7.37MHz W65C02, but it doesn't! It will fail memory diagnostic intermittently after 100 or so passes (about 30-seconds run), but it will pass diagnostic at 3.68MHz even after 10-minute run . It turns out it is fast enough to run 14.7MHz and will also pass diagnostic after 10-minute run. I have KM62256-10 that passed the same diagnostic at 3.68MHz and 7.37MHz. It is not fast enough to run 14.7MHz.

I've tried several different 128Kx8 RAM and they all passed. Table summarizes the various tests. The outlier is AS6C62256 failed at 7.37MHz but mysteriously passed at 3.68MHz and 14.7MHz. This is quite a mystery!
Bill
Attachment:
memory_diag_summary.jpg
memory_diag_summary.jpg [ 61.27 KiB | Viewed 1906 times ]


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drogon
PostPosted: Fri Jan 19, 2024 10:21 pm 
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plasmo wrote:
I decided to take another look at AS6C62256. I have a barebone 6502 SBC in pc board which should be more reproducible in case of errors. I do have to make small modification to accommodate 32Kx8 RAM. AS6C62256 is rated 55nS, so it should work with 7.37MHz W65C02, but it doesn't! It will fail memory diagnostic intermittently after 100 or so passes (about 30-seconds run), but it will pass diagnostic at 3.68MHz even after 10-minute run . It turns out it is fast enough to run 14.7MHz and will also pass diagnostic after 10-minute run. I have KM62256-10 that passed the same diagnostic at 3.68MHz and 7.37MHz. It is not fast enough to run 14.7MHz.

I've tried several different 128Kx8 RAM and they all passed. Table summarizes the various tests. The outlier is AS6C62256 failed at 7.37MHz but mysteriously passed at 3.68MHz and 14.7MHz. This is quite a mystery!
Bill
Attachment:
memory_diag_summary.jpg



Curiously, in my Ruby '816 system I'm using the AS6C4008-55, so 55nS. I was hoping it would be stable at 8Mhz while I soldered up some SMT chips on carriers, but to my surprise it was solid right up to 16Mhz. (and down to 1Mhz too). I've tried 4 different ones of the same type and all have worked perfectly.

There may well be something odd about them, but they're good for me.

-Gordon

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See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/
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plasmo
PostPosted: Fri Jan 19, 2024 11:57 pm 
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plasmo wrote:
This is quite a mystery![/attachment]

OK, I can explain it.

The board was designed for 32-pin 128Kx8 or 64Kx8 RAM, so pin 30 is chip_select_high which is jumper-able to either PHI2 clock for 6502 or ~RESET for Z80 configuration. For 28-pin 32Kx8 AS6C62256 and KM62256, that's a power pin. When modifying the socket to accommodate 62256, I brought power to it through the jumper block which is over 1" of 7mil trace and not bypassed with 0.1uF cap. That is the problem. Once I jumpered with shorter wire and bypass the RAM, it (AS6C62256) passed 20 minutes of memory diagnostic.

The fact remains that AS6C62256 needs more stable power that is properly bypassed. The other 32Kx8 RAM, KM62256, was able to run correctly with previously poorly bypassed power.
Bill
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BigDumbDinosaur
PostPosted: Sat Jan 20, 2024 12:40 am 
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plasmo wrote:
The fact remains that AS6C62256 needs more stable power that is properly bypassed. The other 32Kx8 RAM, KM62256, was able to run correctly with previously poorly bypassed power.

It sounds as though when the AS6C62256 is selected and it hits the power supply with a large transient.  This is an effect usually seen with EPROMs—I’ve noted it in my POC units.  Perhaps a parallel combination of a 0.1 µF MLCC and a 100 µF, low-ESR electrolytic is needed at the SRAM’s VCC pin.

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pdragon
PostPosted: Sat Jan 20, 2024 12:55 am 
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after a bunch of exploration, more power grid, more caps, not to mention a toll of magic smoke :cry: i've discovered a secret about this unreliable memory!

see if you can spot the difference between the two pictures...

:oops:


:oops:


:oops:


:oops:


:oops:


what do you know, the RAM works more reliably if VCC is actually connected to +5V rather than thin air! I can only imagine how it was working at all before, perhaps stealing power from the addr/data pins?! (fwiw, also works happily with a 1MHz crystal)


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bootok.jpg
bootok.jpg [ 1.04 MiB | Viewed 1852 times ]
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plasmo
PostPosted: Sat Jan 20, 2024 4:47 am 
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Good, I'm glad you have it resolved. AS6C62256 is not to blame, but I do believe it has more stringent power regulation needs.

It is amazing how a CMOS part can work without its power hooked up. I have a Z180 design with completely missing power pin due to a library error. I build several boards, tested and delivered; never even realized Z180's power pin is not hooked up. I talked to the user years later, he never had problems; CP/M ran just fine, he took it to several shows; worked great!!
Bill
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barnacle
PostPosted: Sat Jan 20, 2024 6:25 am 
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This is to be expected with CMOS parts because of the default diode from all inputs to the substrate. It's one you don't think of, but if the input can supply enough power (think a 4mA output connected to an 'unpowered' input on a chip that needs a handful of microamps) then the part will cheerfully operate. The Vcc will be ~0.6v low, but CMOS often doesn't care about that, though a 3v3 system might be fussier than a 5v system, and of course once on chip is powered, they all are...

It's often the case that a serial input (idling high) will power an entire processor even though it thinks it's turned off; at the very least it will interfere with power-on-reset on the chip. Particularly when you're designing the system to use only a few microamps most of the time, a serial connection for e.g. debugging can ruin your whole day.

Neil
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