Many thanks to all of the great responses I got back on this yesterday. There were a lot of problems with the schematics from round one, everything from not qualifying the CE's and OE's properly, to not even including enough ROM chips for what I mapped out. Yikes!

But thanks in no small part from the great replies and discussion that ensued, I have created what I think incorporates the fixes that were pointed out to me. This is not a full schematic of the machine. This is just the main parts that needed to be designed. The rest of it, such as reset circuit, decoupling caps, power and grounds, are not really parts that need design decisions and including them on this drawing will just clutter things up for now when I really just need to make sure the decoding and selection logic is sound. It was getting pretty hard to follow if I drew in all the wires, so I have switched to just labeling them with tags.

This is an unusual build that will not be an interactive computer, and will basically just store a large array of bytes in ROMs that it will spit out the UART on the 6551. There's two other posts about it for background: http://forum.6502.org/viewtopic.php?f=12&t=5893 and http://forum.6502.org/viewtopic.php?f=12&t=5898

It's only running at 1MHz, and will be on solderless breadboards unless I absolutely have to solder it up.

Does this look like it might work this time? There were a lot of errors to fix.

(Just to note, what we generally see here on 6502.org for projects, even long-running ones, is a single thread which broadly alternates between updates and queries. If you do start new threads, please link back to previous ones. Otherwise you'll either end up with context-free responses, or you'll have people searching back for which threads relate to the one project.)

Any particular reason for using the 74HC132 to generate /RD and /WD?

BTW, in schematics it's usually better to use logic symbols for gates, instead of representing them as rectangles with pins. Seeing logic symbols makes it much easier to understand what's going on in the circuit. Although many of us are quite familiar with glue logic hardware, not all can mentally translate pin numbers into input and outputs.

Also, I second Ed's suggestion that you create one topic on your project and add to it as it moves along. Doing so should make it easier for the reader to understand what you are attempting to accomplish, and what steps had to be taken to get there. Also, you will find it useful if you forget something, since you will have presumably written down all of it as you post.

Oh, almost forgot. Be sure to terminate any unused inputs to Vcc or GND. Leaving a CMOS input floating will make the affected device very sensitive to noise and cause it to constantly switch states, leading to a considerable increase in power consumption.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

I have seen the schmitt triggered version of the NAND gates used in many other designs and thought that they were appropriate here, thinking that perhaps my solderless breadboard build may be a bit more noisy on the clock line and that those would compensate better. Would 74x00's be better for this application as depicted in the attached schematic?

Thanks for the input on how build threads typically go on this forum. It is hard to tell as a newbie coming in, as the whole forum is a wealth of info that I keep jumping around in. I haven't been able to settle in to seeing the flow of how a project develops on here. I'll keep the rest of the build in this thread.

Given that breadboard circuits tend to be plagued with reactive effects that distort edges, the '132 won't hurt anything, and might help. Once you decide to build on a PCB, reactive effects won't be as much a problem—assuming good layout—and you can use the somewhat-faster '00.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!