Second circuitry worked ?
Congratulations: it's the concept of how we do register write control in our 20MHz TTL CPU.
Downside of that circuitry is, that the LD signals from the address decoder now have to be HIGH_active.
Adding 7404 inverters to the outputs of a 74138 would be an option.
Another option would be using the (slightly exotic) 74240 8 Bit inverting buffer instead of the 7404,
which would simplify the PCB layout, but from the datasheets 74240 seems to be a little bit slower than the 7404.
74238 is a decoder similar to 74138, except that it has HIGH_active outputs.
But that chip seems to be a bit... exotic.
;---
Now some more words about the bus interface:
65816 puts A23..A16 on the data bus during PHI2 = 0,
to be fair to those who want to build a
65816 accelerator card for the C64,
maybe it would be better if the TTL 6526 doesn't drive the data bus during read cycles when PHI2 = 0.
In our TTL CPU, we had put 100 Ohm resistors into the lines between the 74AC\74ACT chips and the bus connectors for preventing the old NMOS chips in the C64 from getting damaged:
First: the drivers inside the old C64 NMOS chips can sink/source a lot less current than the new 74AC\74ACT chips.
Second: 74AC\74ACT gives out signals with _fast_ rising and falling edges, and maybe there is a bit too much energy in these edges to keep old NMOS chips healthy in the long run.
Third: When the C64 and the TTL CPU are running with two different power supplies, both power supplies usually are not switched on\off at the same moment.
;
Because we ran out of PCB space, we had to use individual resistors, but I should mention there are
resistor networks in DIP16 package which contain 8 individual resistors.
(When using them, don't solder them into the PCB directly, but have them plugged into precision DIP sockets instead,
just in case it becomes necessary to tinker with the resistor values... during debugging, maybe).
Also, we had decided not to use SMD chips for signals that go into the CPU, but chips in DIP packages instead,
(plugged into precision DIP sockets) so one could resort to chips from different logic families:
74ACT is fast, and has a ca. 1.3V logic level threshold (TTL compatible). But because of this, it's sensitive to "dirt" on the bus lines.
74AC is fast, when powered with a +5V supply it has a 2.5V logic level threshold. As in "still fast, less sensitive to dirt, but probably won't work with a C64".
74HCT is slow, and has a ca. 1.3V logic level threshold (TTL compatible). //That's your first choice if 74ACT gives you trouble.
74HC is slow, when powered with a +5V supply it has a 2.5V logic level threshold. //Safe, but slow, probably won't work with a C64.
//Logic level threshold is the "turning point" which seperates the logic LOW from a logic HIGH at the input pin of a logic gate.
The list above contains CMOS chips only. In "case of emergency", 74ALS245 also makes a nice bus driver.
Hmm... a lot of capacitance slows down a bus, and IC pins tend to have some capacitance
which sums up when a lot of chips are tied to the same bus.
For this reason, it would be better to have buffers between the bus and the address decoders etc.
Using two different 8 Bit data busses inside the TTL 6526 (one for read, one for write) is a good idea,
because it simplifies the math for the timing a lot when aiming for speed... at the cost of a more complicated PCB layout.
One bidirectional databus (for read and write) inside the TTL6526 would simplify PCB layout,
at the cost of making the math for the timing a lot more complicated... please DON'T do that.
;---
Two threads.
I'm now getting confused about where to post my stuff...
let's just put the experiments in this thread, and the implementation of the "end product" in that other thread ?
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. Even though my main goal is to replace the 6526 in a C64, I also will test it with a modern 6502, to test how fast can I push it.