__STACKSIZE__:  value = $0200, weak = yes;

__STACKSIZE__:  value = $0200, type = weak

    __STACKSIZE__: type = weak, value = $0800; # 2k stack

; ---------------------------------------------------------------------------
; delay.s
; ---------------------------------------------------------------------------
;
; Delay subroutines

.export _delay_3us,_delay_ms

.segment  "CODE"

; ---------------------------------------------------------------------------
; Delay 3us
_delay_3us:
   tax
delay_3us_loop:
   dex
   bne delay_3us_loop
   rts

; ---------------------------------------------------------------------------
; Delay ms
_delay_ms:
   tay
delay_ms_loop1:   
   ldx #$FF
delay_ms_loop2:
   jsr _delay_3us
   dex
   bne delay_ms_loop2
   dey
   bne delay_ms_loop1
   rts

#ifndef _DELAY_H_
#define _DELAY_H_

extern void __fastcall__ delay_3us (uint8_t duration);
extern void __fastcall__ delay_ms (uint8_t duration);

#endif

; ---------------------------------------------------------------------------
; hd44780.s
; ---------------------------------------------------------------------------
;
; LCD driver

hd44780_cmd      =   $A380
hd44780_data   =   $A381

.import _delay_3us,_delay_ms
.export _hd44780_init,_hd44780_putc, _hd44780_puts, _hd44780_cmd

.segment "ZEROPAGE"

ptr:
   .res 2

.segment  "CODE"

; ---------------------------------------------------------------------------
; Initialize display
_hd44780_init:
   ;delay 100ms
   lda #$64
   jsr _delay_ms
   lda #$30
   sta hd44780_cmd
   ;delay 10ms
   lda #$0A
   jsr _delay_ms
   lda #$30
   sta hd44780_cmd
   ;delay 100us
   lda #$21
   jsr _delay_3us
   lda #$30
   sta hd44780_cmd
   ;delay 100us
   lda #$21
   jsr _delay_3us
   lda #$38
   jsr _hd44780_cmd
   lda #$08
   jsr _hd44780_cmd
   lda #$01
   jsr _hd44780_cmd
   lda #$06
   jsr _hd44780_cmd
   lda #$0C
   jsr _hd44780_cmd
   rts

; ---------------------------------------------------------------------------
; Send one character
_hd44780_putc:
   pha
   jsr _hd44780_busy
   pla
   sta hd44780_data
   rts

; ---------------------------------------------------------------------------
; Send string of characters terminated by \0   
_hd44780_puts:
   ldy #$00
   stx ptr
   sta ptr+1
hd44780_puts_loop:
   lda (ptr),y
   beq hd44780_puts_return
   jsr _hd44780_putc
   iny
   jmp hd44780_puts_loop
hd44780_puts_return:   
   rts

; ---------------------------------------------------------------------------
; Send command
_hd44780_cmd:
   pha
   jsr _hd44780_busy
   pla
   sta hd44780_cmd
   rts
   
; ---------------------------------------------------------------------------
; Wait for busy flag   
_hd44780_busy:
   lda hd44780_cmd
   and #$80
   bne _hd44780_busy
   rts

#ifndef _HD44780_H_
#define _HD44780_H_

#include <stdint.h>

extern void hd44780_init (void);
extern void __fastcall__ hd44780_putc (char c);
extern void __fastcall__ hd44780_puts (char *str);
extern void __fastcall__ hd44780_cmd (uint8_t cmd);
extern void __fastcall__ hd44780_gotoxy (uint8_t x, uint8_t y);

#endif

# Adjust the run address to match the .org in the source code
all: main.hex

main.hex: a.out
   bin2hex.py --offset=0xc000 a.out main.hex

a.out: interrupt.o vectors.o main.o hd44780.o delay.o
   ld65 -C ./lib/ethergeiger.cfg -m main.map interrupt.o vectors.o hd44780.o delay.o main.o ./lib/ethergeiger.lib   

main.s: main.c
   cc65 -t none -O --cpu 6502 main.c
   
main.o: main.s
   ca65 --cpu 6502 main.s
   
delay.o: delay.s
   ca65 --cpu 6502 delay.s
   
hd44780.o: hd44780.s
   ca65 --cpu 6502 hd44780.s
   
interrupt.o: interrupt.s
   ca65 --cpu 6502 interrupt.s
   
vectors.o: vectors.s
   ca65 --cpu 6502 vectors.s   
   
clean:
   $(RM) *.o *.lst *.map, *.out, *.hex a.out main.s

; ---------------------------------------------------------------------------
; Delay 3us
_delay_3us:
   tax
delay_3us_loop:
   dex
   bne delay_3us_loop
   rts

; ---------------------------------------------------------------------------
; Delay ms
_delay_ms:
   tay
delay_ms_loop1:   
   ldx #$FF
delay_ms_loop2:
   jsr _delay_3us
   dex
   bne delay_ms_loop2
   dey
   bne delay_ms_loop1
   rts

; Delay subroutines

.export _delay_5us,_delay_ms

.segment  "CODE"

; ---------------------------------------------------------------------------
; Delay 5us
; there's an additional 15us overhead for each call, so the
; minimum delay is 20us with increments of 5us. The formula is:
; duration = 5*a + 15, where "a" is the value in the accumulator
; note a value of zero in "a" is treated as 256, not zero!
_delay_5us:
   nop
   tax
delay_5us_loop:
   dex
   bne delay_5us_loop
   rts

; ---------------------------------------------------------------------------
; Delay ms
_delay_ms:
   tay
   lda #196                            ; 196*5 + 15 = 995 (dey&bne take 5 cycles)
delay_ms_loop1:   
   jsr _delay_5us
   dey
   bne delay_ms_loop1
   rts