In the deepest recesses of my memory I remember reading many years ago that the 8-bit data bus on the 65C816 was not a handicap because it could do two memory operations in one cycle to transfer 16-bits to the processor.

Is that a false memory, or is that true. I spent ages trying to look it up but could not find the article.

If it is a false memory and the 65C816 needs two full cycles to transfer 16-bits then I wish at some point WDC made a 65C816 with a full 16-bit data bus. Since most instructions are one or two bytes, there would be a significant performance uplift.

It does not do a 16 bit transfer in 1 cycle, but it can do a 16 bit transfer with 1 instruction, and it only adds 1 cycle over an 8 bit operation. For instance, LDA Absolute take 4 cycles for 8 bits and 5 cycles for 16 bits. Compared to two 4-cycle 8-bit reads, you save 3 cycles and reduce memory needed for the program (3 bytes vs 6 bytes).

I hope that helps!

Daryl

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Brilliant, thank you!

BTW, welcome, rpiguy2!