I'm working on a home brew system and I happen to need 64k of dual port Ram. What do you guys recommend. My setup has a 65816 CPU running at 14 MHz but I have a chip that needs read only access to all 64k. From my research a dual port ram setup would work, but I have not been able to verify which dual port ram. I have also been considering using a MMU as well.

Also, introducing myself. I grew up with an Atari 800 and a C64. I used the C64 more of the two, and am more experienced with the Commodore. But I fondly remember both 8 bit systems.

I currently own 2 commodore 64s and one Atari XE130.

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I am working on building a 65816 based computer (for personal use)

Eventual goals include:
65816 CPU up to 14-16 MHz (In Turbo Mode)
up to 16MB RAM (512K on the main board)
Dual YM3438 audio
IEC serial device support

I've been looking at this.

https://www.ebay.com/itm/111614113061

Or this

https://www.ebay.com/itm/322122971785

_________________
I am working on building a 65816 based computer (for personal use)

Eventual goals include:
65816 CPU up to 14-16 MHz (In Turbo Mode)
up to 16MB RAM (512K on the main board)
Dual YM3438 audio
IEC serial device support

Welcome! You have a good 6502 history and setup there... I can't help directly with choice of dual port RAM, but searching the forum I see the Romulus project used an IDT7007 32K x 8 Dual-Port RAM.

I generally search Farnell or Digikey for components - it gives an idea of availability and price even if you buy from elsewhere. It's quick to select, for example, through hole or 5V parts if that's what you want.

Example, Digikey has 3446 matches for dual port RAM.
http://www.digikey.co.uk/products/en/in ... ort%20sram
Just 1807 are 5V supply. Just 48 are current instock parts. Just 2 of those are through-hole, namely the IDT 7130 and 7132, which is to say 1k x 8 and 2k x 8.

(As we've noted many times, 5V and through-hole is becoming ever more niche, so we're pushed towards surface mount and/or 3V supply)

I see you've already found on ebay
IDT7005L55J HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM (in LCC package, 5V)
CY7C006-35JC CYPRESS 16K x 8/9 Dual-Port Static RAM (in PLCC, 5V)

So, these may not be new, and they are surface-mount, but that might be fine for your purposes.

You'd be well-advised to read the datasheets, and of course to check the reputation of the supplier.

Possibly, you could also work with a single port RAM and a CPLD that provides two alternating accesses within a 14 MHz cycle.

Looks like I forgot to mention that the second chip which needs ram access can only run at 1 MHz. I'm not sure whether a CPLD can handle that or not, because that makes it a little trickier than just alternating access.

But a CPLD does probably have a place in my build. I'm pretty sure that if I use original ROMs that they won't run at the speeds I need, so I'll probably need something like a CPLD to copy the ROM to ram at startup, check for key presses, and do other such tasks before handing control over to the CPU.

_________________
I am working on building a 65816 based computer (for personal use)

Eventual goals include:
65816 CPU up to 14-16 MHz (In Turbo Mode)
up to 16MB RAM (512K on the main board)
Dual YM3438 audio
IEC serial device support

Welcome!

There are several alternatives to actual dual-port RAM. They aren't quite as flexible, but often the limitations can be worked around. This'll depend on the function of the other chip you mention. Is it for video?

-- Jeff

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Yes. I'm not fully committed but I'm thinking I want to run a VIC-II for video which I want to grant access to the 64k. Since the 65816 can access 16mb any ram beyond the first 64k can be single port ram. I'm just in my research phase and looking at which parts I want. Obviously DIP form factors are easier for prototype phase, but only relatively small rams come in that form. My final design however will socket as many chips as possible. So I'm fine with LCC and PLCC forms. Surface mount is not as prototype friendly, but if that's the only option, then I can do that.

Compact size is not a major concern for me.

_________________
I am working on building a 65816 based computer (for personal use)

Eventual goals include:
65816 CPU up to 14-16 MHz (In Turbo Mode)
up to 16MB RAM (512K on the main board)
Dual YM3438 audio
IEC serial device support

A single, shared memory could be made to work using a simple arbitration scheme, such as 13 cycles for the '816 followed by 1 cycle for the VIC, and so on. (The '816 would get a 1-cycle wait state.) Or: the '816 could run 7 cycles during every Phase1 period of the VIC's 1 MHz clock, then wait 7 cycles during the VIC's Phase2. Lots of variations are possible.

I guess my drift is to avoid 64K of actual dual-port RAM, because it'd be bulky and somewhat expensive. It depends on your priorities. If you don't use dual-port RAM then your job gets more challenging. For example you might end up with one RAM but with a multiplexer on its address inputs and an extra data path on its outputs. You'll learn a lot doing it that way! But maybe right now you prefer to focus your attention elsewhere.

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

In my 6502 sandbox project I used an FPGA between SRAM and 6502. The 6502 had full access to the SRAM, but the FPGA would also generate video by reading the same SRAM.

The method I used was to generate the CPU clock inside the FPGA, by dividing a master clock by 12. Because the clocks were synchronized, I didn't have to watch the 6502 address bus and control signals all the time. Each of the 12 internal cycles was pre-allocated to a certain function. So, always in cycle 2, the video address was written to SRAM, and in cycle 4, the data was read back.

In my case, the video generator was done inside the FPGA, but this could also work with an external chip. If you generate both CPU clock and video clock, you can control the offset so that each does SRAM access on a different internal cycle.

(while I was typing, I see that Dr Jefyll posted something similar)

Ok. I love that there are so many options out there to handle stuff. The dual port ram overall appeals apart from cost because the handling of the ram is so transparent to both the CPU and the VIC chip. With other options it can be relatively transparent, but if I can avoid cpus cycles being lost to the VIC chip, I prefer that. The dual port ram option lets me eliminate the CPU cycle stealing (at least I think it does unless there is something I'm overlooking) and let's the two operate relatively independant of one another. I'm sure my approach may introduce new unexpected behaviors. And I'm sure that either a CPLD or FPGA will be needed regardless of my approach. I have plenty of time to lay out my schematics and consider my options. I have no deadline.

I'm aiming for C64 compatibility in my build. I'm not going for perfect compatibility, just an acceptable level. I'm not aiming for SuperCPU compatibility at all. Mostly it will just be my own project to see what I can do. My IO functions will most likely use 65C22s so a faster bus won't be an issue there. For RAM beyond the initial 64k I will probably use some standard memory module and just have it ignore (or mirror) the first 64k bank.

I have real C64s for when compatibility really matters, but I want to be able to run at least some software natively. And if it benefits from added speed then that is great. I imagine GEOS will probably play well, but that is not a deal breaker. I may implement the ability to use a different graphics chip as well, perhaps by holding down a key on startup.

_________________
I am working on building a 65816 based computer (for personal use)

Eventual goals include:
65816 CPU up to 14-16 MHz (In Turbo Mode)
up to 16MB RAM (512K on the main board)
Dual YM3438 audio
IEC serial device support

One thing that has occurred to me in the compatibility realm is I'm not sure about the SID chip implementation yet. I know there is an FPGASID project and I'm not opposed to that as stereo SID appeals. I just either need a solution that works at 14+ MHz or I need an adapter that can handle the bus speed difference.

_________________
I am working on building a 65816 based computer (for personal use)

Eventual goals include:
65816 CPU up to 14-16 MHz (In Turbo Mode)
up to 16MB RAM (512K on the main board)
Dual YM3438 audio
IEC serial device support

I realized that Dr Jefyll and me posted two different solutions. In his proposal, the CPU is paused for 1 in 14 cycles, while the video data is fetched.

In my implementation, you take a small part of every CPU cycle to perform video access. This doesn't slow down the CPU, but it does require higher frequency inside the CPLD/FPGA, and a RAM that's fast enough to do two accesses in 70 ns.

I'm liking some of these alternative options. To be honest, I'm not an electrical engineer or much of a programmer. I can read schematics and figure stuff out and I love the challenge. I am not familiar with using FPGAs or CPLDs. But I know they can overcome a lot of complicated problems. If it has a real cost advantage to use some method to use faster RAM and implement some type of sharing scheme, I think that's great. But I do want the solution to be elegant and transparent. Much of the software I'll be running on the final product is not going to be designed around anything special.

I like the suggestions so far. As I get closer I'll be sure to post my parts list. And I'll be looking at as many other builds as I can.

_________________
I am working on building a 65816 based computer (for personal use)

Eventual goals include:
65816 CPU up to 14-16 MHz (In Turbo Mode)
up to 16MB RAM (512K on the main board)
Dual YM3438 audio
IEC serial device support

So I have another somewhat related question. I guess if I understand correctly that I can use a FPGA to generate clock signals. If so, can I use one to allow me to generate a signal both for the 1 MHz devices and allow the CPU to run at several different frequencies?

_________________
I am working on building a 65816 based computer (for personal use)

Eventual goals include:
65816 CPU up to 14-16 MHz (In Turbo Mode)
up to 16MB RAM (512K on the main board)
Dual YM3438 audio
IEC serial device support

Yes, no problem. You can divide frequencies using a simple counter, and you can even multiply frequencies using built-in PLL. For instance, if you have a 1 MHz input into the FPGA, you can use the PLL to make a 70 MHz signal, and then divide that by 5 to create a 14 MHz clock. If you want, you could also change frequencies dynamically.