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PostPosted: Mon Jul 18, 2016 6:44 pm 
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According to the primer (http://wilsonminesco.com/6502primer/MysteryPins.html), it says tie /SOB to 5V.

Should it really go directly to 5V (or 3.3V) or should it go through a pull-up resistor?

I prefer consistency so if I pull other pins via a 3.3k pull-up, is there any harm in doing the same with /SOB?

Thanks.

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PostPosted: Mon Jul 18, 2016 7:06 pm 
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There's no harm in putting a resistor in the pull-up circuit. Many would advocate using the resistor so that if later you want to use the pin, you can connect to it without having to remove the short to Vcc, especially if it's on a PC board where you can't just remove a wire wrap or something like that. If you will never use the SO\ pin, there is no harm in connecting it directly to Vcc with no resistor.

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PostPosted: Mon Jul 18, 2016 7:24 pm 
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Well, what I'm making is a back-plane board. Something for prototyping.


What I was thinking about doing is something like:

Code:

/SOB---------- (to female header)--->
          |
         [R]   (3.3k)
          |
          ------  VCC



So, if the user actually wanted to use that pin, then they could. But if they chose to leave it un-connected on the daughter card, then it would safely be tied to VCC via 3.3k pull-up.

Does that seem like a logical design?

Thanks!

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PostPosted: Mon Jul 18, 2016 8:25 pm 
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In general you should use pull-ups for CMOS inputs. The say you can tie them to VCC directly, but when the device input is latched-up then the inrush current can destroy the device. Modern devices have some protection built-in against latch up and electro static discharge, but still this is no guarantee. I always use 1k8 Ohm pull-ups.


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PostPosted: Mon Jul 18, 2016 8:27 pm 
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I see different values used. Would 3.3k be good on all inputs? This would only be for CMOS (65C02).

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PostPosted: Mon Jul 18, 2016 9:00 pm 
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cbscpe wrote:
but when the device input is latched-up then the inrush current can destroy the device

This one will need some explanation. "Inrush" is when you power it up. It's not possible to have it latched up before power-up. The only time I've had a latch-up situation was with a (non-WDC) 65c22 controlling a printer across the room whose power cord was plugged into a different circuit, and a spike caused the latch-up. No inputs were connected to Vcc. It happened a few times, and the '22 got hot, but was never damaged.

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PostPosted: Mon Jul 18, 2016 10:05 pm 
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cbmeeks wrote:
I see different values used. Would 3.3k be good on all inputs? This would only be for CMOS (65C02).


3.3K is fine.

When you pull up an input that's not connected to an output, the only current that goes through the pullup resistor is the current to keep the input high; when you attach another (output) device that wants to pull the input low, it has to be able to sink the current to pull the input low, plus the current through the resistor.

But with a CMOS input, the input impedance is so high that you can pretty much ignore the current that goes into the input. So for simplicity, you can dimension your resistor in such a way that, in the worst case (where the hypothetical device tries to pull the input all the way to ground), the current through the resistor is less than what the output can sink. Ohm's Law says that in the worst case (where the input is shorted to ground), a 3.3K resistor pulling up to a 3.3V power supply will have 1mA running through it. (I=V/R=3.3V/3300ohm=0.001A). In general, most outputs can sink at least 20mA so the 3.3K resistor will only use 1/20th of the available capacity. That's just fine.

If you use a lower pullup resistor value, you eventually get into a danger zone where an output can't sink enough current, and the output's pull-down transistor fails (or if you have a really strong output, you might burn your resistor because it gets too hot). But this doesn't happen until you're in the ~200 Ohm range or so.

If you use a higher pullup resistor value, you eventually end up with a resistor that lets so little current through that it doesn't pull the input up anymore when nothing else is pulling it down. Also, you end up with glitchy-ness because the input will have just enough bias voltage to be really close to going high, but not quite. It will start acting like a touch sensor: when you touch the contact with your finger, the current through your body to ground, and naturally occurring electric fields from the mains will cause the input to go low or high, at a 50Hz or 60Hz frequency. This happens with pullup resistors in the 100K range or so.

So, personally I'd stick to between 2.2K and 10K.

===Jac


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PostPosted: Tue Jul 19, 2016 5:25 am 
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cbmeeks wrote:
I see different values used. Would 3.3k be good on all inputs? This would only be for CMOS (65C02).

I uniformly use 3.3K for this purpose.

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