6502.org Forum  Projects  Code  Documents  Tools  Forum
It is currently Sat May 04, 2024 10:28 pm

All times are UTC




Post new topic Reply to topic  [ 5 posts ] 
Author Message
PostPosted: Thu Apr 07, 2016 1:36 am 
Offline
User avatar

Joined: Wed Aug 17, 2005 12:07 am
Posts: 1207
Location: Soddy-Daisy, TN USA
I have my 65C02 wired up to a breadboard.

I have RDY, IRQB, NMIB, etc. pulled high through a 3.3k resistor.

I have the data bus wired to $EA.

My scope is on A0.

For my clock, I have a 3.579545 MHz crystal cocking a 74HC4040 counter. From the counter, Q0 is outputting half that at 1.7897725 MHz (within the limitation of my breadboard).

That 1.79MHz clock is then fed to PHI2 to the 65C02. Now, I thought A0 would be half that at 895kHz or so. But instead, it's 446.4kHz which is half again.

What gives? Is it because the NOP takes two cycles and the program counter "stalls" during those two cycles?

Any information would be appreciated.

But at least I can see the PC is working. :-D

Thanks

_________________
Cat; the other white meat.


Top
 Profile  
Reply with quote  
PostPosted: Thu Apr 07, 2016 1:54 am 
Offline
User avatar

Joined: Wed Feb 13, 2013 1:38 pm
Posts: 586
Location: Michigan, USA
Here's an R65C02 reset cycle as monitored by a PIC microcontroller which is single-cycling the R65C02. The first column shows 'R' for 'read', the second column is the contents of the address bus, and the third column is the contents of the data bus (supplied by the PIC at the point when the reset vector is being read). I regret not collecting the <sync> pin status which would have shown the instruction 'fetch' cycles.

Hope this helps...

Cheerful regards, Mike


Attachments:
6502 reset.png
6502 reset.png [ 8.08 KiB | Viewed 1120 times ]
Top
 Profile  
Reply with quote  
PostPosted: Thu Apr 07, 2016 2:26 am 
Offline

Joined: Sun Jul 28, 2013 12:59 am
Posts: 235
cbmeeks wrote:
What gives? Is it because the NOP takes two cycles and the program counter "stalls" during those two cycles?

Yes, the NOP takes two cycles. During cycle one, it fetches the NOP instruction. During cycle two, it does the no-operation and fetches (and discards) the next instruction. Then, on cycle three, it fetches that next instruction again (repeating cycle one). Repeat to nausea.

For a two-cycle instruction that increases the program counter once per cycle, try something like BIT #imm. Or, since you're on a 'C02, there are some single-cycle NOPs available.


Top
 Profile  
Reply with quote  
PostPosted: Thu Apr 07, 2016 4:09 am 
Offline
User avatar

Joined: Fri Aug 30, 2002 1:09 am
Posts: 8432
Location: Southern California
or even something like LDA#$A9 which takes two bytes and two clocks.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?


Top
 Profile  
Reply with quote  
PostPosted: Thu Apr 07, 2016 12:57 pm 
Offline
User avatar

Joined: Wed Aug 17, 2005 12:07 am
Posts: 1207
Location: Soddy-Daisy, TN USA
Thanks for the suggestions.

It's clear to me now why I am getting the results that I am. Learn something new every day. :-)

Next step is to get an actual EEPROM running some real code.....probably blinking some LED's through a VIA.

After that, a serial connection.

Then, on to some music with an AY-3-8912. :-D

_________________
Cat; the other white meat.


Top
 Profile  
Reply with quote  
Display posts from previous:  Sort by  
Post new topic Reply to topic  [ 5 posts ] 

All times are UTC


Who is online

Users browsing this forum: No registered users and 1 guest


You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot post attachments in this forum

Search for:
Jump to: