RogerRabbit wrote:
Attached are the code extracts.
The BOOT spreadsheet is just the code as it's executing the RESET handler starting at $27B0. It's initializing various memory locations and it looks perfectly normal.
The CODE 1, 2, and 3 spreadsheets are similar to the earlier spreadsheet. It appears that it's waiting in the loop in the $5F3C routine, which, as mentioned above, is waiting for bit 4 of memory location $1800 to be zero.
I'm pretty sure addresses $1C00 to $1FFF are I/O, not RAM. I'm not sure whether (non /DME) addresses $1800 to $1BFF are RAM or I/O, but they may be I/O.
$1800 is written to and read from in ROM1. None of those writes appears to ever set bit 4, suggesting that $1800 may be I/O. Bit 4 appears to function as either a Busy flag (where zero means not busy) or a Operation Complete flag (where zero means the operation is complete), and the $5F3C routine waits until not Busy (or until Complete).
It's not clear what would ever set that bit. Most of the writes (in the ROM1 code) to $1800 are preceded by a LDA immediate and the immediate value has bit 4 clear. (Example: at $27F6 in the RESET handler is a LDA #$0F STA $1800) There are a couple of places where memory location $51 (almost certainly RAM) is copied to $1800, so I looked into what gets written to memory location $51.
All writes to $51 are preceded by a LDA immediate, and that immediate value is either $05 or $09, so in both cases bit 4 is zero. Again this suggests that memory location $1800 is I/O, i.e. something in the hardware sets bit 4, and either it is cleared by a write to $1800 (with bit 4 zero), or writes to bit 4 are ignored.
ROM3 does not reference memory locations $51 or $1800 (and it uses no (zp,X) addressing). I don't think it accesses either memory location via (zp),Y addressing, but I haven't examined all of the (zp),Y addressing in detail. It's possible I've missed a reference to $1800 (or $51) somewhere, but I think it's most likely that all reference use absolute (without an index register) addressing (and zero page addressing for $51).
Likewise, it's possible that ROM1 writes to $1800 using (zp,X) or (zp),Y addressing. I doubt that it does, but again, I have not examined in detail all of the places where such addressing is used, i.e. the same caveats as ROM3 apply here.
Dr Jefyll wrote:
I should clarify. With 6509, it is only lda (ind),y and sta (ind),y which are affected. 6509 does not bank-switch for other instructions which use (ind),y address mode (although perhaps the M50734 does -- it's unknown).
It's likely that's the case for the M50734 also. There are only a half dozen (zp),Y instructions in ROM1 and ROM3 combined that are neither LDA nor STA, and the addresses in the zp pointer when those instructions execute are all well below $2000 (mostly $3xx to $5xx).
I suppose we don't really have a good way to verify that theory, but for this application, it doesn't matter. /DME makes sense now.