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PostPosted: Tue Jul 17, 2018 8:09 pm 
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Dr Jefyll wrote:
Hi, qwertykeyboard :)

qwertykeyboard wrote:
it doesn't start at EAEA, but a little bit higher than that. Why is that?
In fact it *does* start at $EAEA but you're not seeing that very first cycle because this procedure you're using is slightly misguided: "It does 2 clock cycles before reading off the address bus since 2 clock cycles are needed to complete the NOP instruction." Instead, try reading off the address in the first cycle. Here's why.

With 65xx processors all opcodes are a single byte, and sometimes an instruction will have one or more operand bytes following the opcode. For performance reasons the processor always follows the opcode fetch with a fetch of the following byte, and often this saves time. NOP is one of the exceptions, however, as there are no operand bytes following the opcode. But the extra fetch happens anyway.

So! After having fetched the Rest Vector the CPU goes to $EAEA to find its first instruction. It fetches the byte at $EAEA, which is the opcode. It then fetches the byte at $EAEB while the NOP completes its execution. But this fetch is actually pointless because there's no operand. After the NOP has completed the CPU will go looking for the next opcode... at $EAEB! IOW it fetches that same byte again. This same pattern repeats endlessly, with the address bus incrementing after the 1st, 3rd, 5th cycle and so on. I hope I explained that so it makes sense!

-- Jeff


Thanks for the input. But, what I'm trying to figure out is how many clock cycles does it take to initialize (after boot up or after the reset was pulsed) to actually start executing the first instruction?


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PostPosted: Tue Jul 17, 2018 8:36 pm 
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I suggest you observe the answer yourself, as it will avoid any miscommunication. Right now you have the arduino connected to A0-A6 of the 6502. So, leave A0-A5 in place. But rather than monitoring A6, monitor SYNC instead. (Also it'll be best if you take a reading every cycle, rather than every other cycle.)

SYNC goes high during the fetch of every opcode. During all other cycles it is low. After reset gets released, the first time SYNC goes high will be the fetch of the first opcode.

To better understand what the CPU does on a cycle-by-cycle basis, see Appendix A of the MCS6500 Family Hardware Manual.

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PostPosted: Wed Jul 18, 2018 12:36 am 
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Ok so I read through that manual and after the reset pin goes high after the chip powers on, it takes 6 clock cycles before it fetches the program count which happens to be EAEA, which can be seen on the 6th cycle on the 6502 I have setup. Pretty neat! :) But what is being shown on the bus before it fetches the program count vector? It's different each time I run the test.


Code:
Cycle: 1
Sync: 0
010000

Cycle: 2
Sync: 0
001111

Cycle: 3
Sync: 0
001110

Cycle: 4
Sync: 0
001100

Cycle: 5
Sync: 0
111100

Cycle: 6
Sync: 1
101010

Cycle: 7
Sync: 0
101011

Cycle: 8
Sync: 1
101011

Cycle: 9
Sync: 0
101100

Cycle: 10
Sync: 1
101100

Cycle: 11
Sync: 0
101101



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PostPosted: Wed Jul 18, 2018 1:09 am 
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What goes on before fetching the reset vector is internal operations, with the processor setting itself up for business. This is in the data sheet. The reset acts kind of like an interrupt and some brands write the current program counter and status to the stack during this process; but most never lower the R/W line, so nothing actually gets written to memory.

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PostPosted: Wed Jul 18, 2018 1:16 am 
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BigDumbDinosaur wrote:
GARTHWILSON wrote:
The '138 3-to-8-line and '154 4-to-16-line decoders are always tempting to the newbies, but their propagation delays are quite long, and the fine-grained address decoding they are usually desired for comes with a speed penalty.

Current versions of the 74HC138 typically achieve prop times in the 10-15ns range on 5 volts, which is way more than is needed in a system running at a couple of megahertz. For faster units, the 74AC138 routinely achieves single digit prop times on 5 volts. For example, ON Semiconductor rates their 74AC138's tPLH at 6.5ns typical, 9.5ns maximum. My POC V1.1 unit uses a 74AC138 to decode I/O and will boot at 15 MHz if the SCSI host adapter isn't installed.

My NSC data book says a max of 40ns @ 4.5V, 34ns @ 6V for the 74HC138's tPHL (which is longer than tPLH). [Edit: It's 60ns max and 51ns max for 4.5V and 6V @ 125°C. Zowee!! Even the '154 is faster, at 30ns max for 6V, and 39ns max for 4.5V, at 125°C.] The 74AC part is much faster but I'm not very anxious to recommend 74AC to new builders, since the fast slew rates tend to get them in trouble.

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PostPosted: Wed Jul 18, 2018 5:03 am 
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GARTHWILSON wrote:
My NSC data book says a max of 40ns @ 4.5V, 34ns @ 6V for the 74HC138's tPHL (which is longer than tPLH). [Edit: It's 60ns max and 51ns max for 4.5V and 6V @ 125°C. Zowee!! Even the '154 is faster, at 30ns max for 6V, and 39ns max for 4.5V, at 125°C.] The 74AC part is much faster but I'm not very anxious to recommend 74AC to new builders, since the fast slew rates tend to get them in trouble.

Your NSC book is woefully out of date. :D Please scroll back and read the 74HC138 data sheet I attached to my post.

I did say that using 74AC could give a newbie some grief due to the switching speeds.

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PostPosted: Wed Jul 18, 2018 5:24 am 
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BigDumbDinosaur wrote:
GARTHWILSON wrote:
My NSC data book says a max of 40ns @ 4.5V, 34ns @ 6V for the 74HC138's tPHL (which is longer than tPLH). [Edit: It's 60ns max and 51ns max for 4.5V and 6V @ 125°C. Zowee!! Even the '154 is faster, at 30ns max for 6V, and 39ns max for 4.5V, at 125°C.] The 74AC part is much faster but I'm not very anxious to recommend 74AC to new builders, since the fast slew rates tend to get them in trouble.

Your NSC book is woefully out of date. :D Please scroll back and read the 74HC138 data sheet I attached to my post.

Previously:
Quote:
Current versions of the 74HC138 typically achieve prop times in the 10-15ns range on 5 volts,

That's the typical. Typical is nice, but you can't design around it. The numbers in your data sheet for max at 25°C and max at 125°C are even longer than my book said.

(Pardon my grouchiness. I'm working on a deratings analysis for a satellite propulsion system, with all the accompanying red tape. I'm going to tell them this is the last one I'm going to do.)

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PostPosted: Fri Jul 20, 2018 5:09 pm 
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GARTHWILSON wrote:
BigDumbDinosaur wrote:
GARTHWILSON wrote:
My NSC data book says a max of 40ns @ 4.5V, 34ns @ 6V for the 74HC138's l. Typical is nice, but you can't design around it. The numbers in your data sheet for max at 25°C and max at 125°C are even longer than my book said.

(Pardon my grouchiness. I'm working on a deratings analysis for a satellite propulsion system, with all the accompanying red tape. I'm going to tell them this is the last one I'm going to do.)

You can design for much better performance if you do device testing and selection. Normally an expensive procedure, but certainly not out of the question for satellite propulsion systems. :wink:

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PostPosted: Tue Jul 24, 2018 2:52 pm 
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qwertykeyboard wrote:
Could the 6809 be a viable option as well?


Well... That's one on my list to build a system around but I'll tell you this, the 6502.org forum really helped me get started building my Tower of Eightness WDC65C02 based system, an ongoing project that keeps me out of trouble.


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PostPosted: Tue Aug 07, 2018 8:23 am 
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DigitalDunc wrote:
qwertykeyboard wrote:
Could the 6809 be a viable option as well?


Well... That's one on my list to build a system around but I'll tell you this, the 6502.org forum really helped me get started building my Tower of Eightness WDC65C02 based system, an ongoing project that keeps me out of trouble.


Ditto on how useful this site has been!


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