Yep, in this case though, the ceramics are 0.1 uF and the electrolytic are 4.7 uF. So beefier in the sense that they can store more power, but I figured there's a difference in how they respond. The 4.7 seemed like a good choice for things like the LCD, and it seemed to help with the 25.175MHz oscillator so that's where I put them. Most other things have the 0.1 ceramics; I grabbed a fair number of them as it didn't take me long to see power fluctuations on some of the other projects I had without them.



I'll give those a read, thank you!

> Most other things have the 0.1 ceramics; I grabbed a fair number of them

That's kind of what I'm responding to: it's not a matter of sprinkling them around, especially if you have a reliability or functionality problem. In that situation, every chip needs a bypass cap, and that means a small-valued (fast) one.

A thing to be aware of is that while the equations don't care whether you use a mica or a ceramic or a tantalum or an aluminium electrolytic capacitor... in practice they behave differently. There are all sorts of gotchas associated with capacitor selection; two in particular are that aluminium electrolytics tend to have a poor high frequency response, and that the capacitance of (particularly) multi-layer ceramic capacitors can significantly reduce as they are biased close to their specified voltage.

You also need to consider the inductance of the leads/circuit board traces between the capacitor, the power rail, and the component that you're attempting to decouple - in general, you want as low an inductance as possible, so you need the decoupling capacitors as close to the component power leads as possible. Inconveniently, TTL logic tends to put the power pins as far away as possible... but with leaded capacitors and breadboards, you can place them over the chip directly to the pins.

On a two-layer board it's not quite that easy but if you have a look at my recent posts, you'll see a couple of circuit board designs that show one approach: on both of those boards, there are two power planes; ground on the top and Vcc on the bottom. These should not be considered reference designs; I'd prefer to use a multi-layer board where the power planes are less broken up for a professional result, but they work fine at the frequencies we care about here.

I'd recommend 10-100nF for these decoupling capacitors; when you get to a circuit board you can use something like 0603 MLCC 10nF 50V ceramics to advantage.

Neil

(It'd be helpful if you could link to those 'recent posts' as they will become increasingly difficult to find as time passes)

An excellent point, sorry about that.

viewtopic.php?f=12&t=7501&start=45#p98423

Neil

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I do understand this, formulas are the ideal physical environment of mathematics that will never truly exist in real life. And to be completely honest, I wouldn't really know how to apply them effectively, even if I knew what they were. Heck, if you want to get very specific about it, you could boil down that manufacturing imperfections can have some effect on the overall performance as well. This is why resistors are always given a percentage of tolerance of what their rated value is after all.



I suppose? This is pushing into a realm of analog logic where my understanding starts very rapidly breaking down. I've tried to keep the 0.1s as close to the chips as I felt I could reasonably get them without having an excess of wiring or fragile connections all over the place. I feel there's a trade off here, if I tried wiring them directly over the chip, there's a good chance they could come loose, or cause other problems. I've had a number of wires pop loose in places, leading me to think I'd roasted something, when in fact it was a data line that popped out of its socket.



I had briefly considered ground/VCC planes, when I started laying out the circuit in EasyEDA for a PCB. I was also debating in my head about how best to spread out (and how many) ground lines I should put in any sort of connectors, and if should add any bus transceivers to help with signal integrity. (Can only drive so many ICs from the current from the 65C02 after all, but maybe it's a non-issue now, some of the tutorial pages seem to conclude it might be?)

=====

My overall point is though, I'm not trying to rely on the 4.7s as a high frequency switching cap. I'm mostly using them to try and smooth out the over all draw on the lines across the breadboards with that rather cheep power supply I'm currently using. If/when I get to the point of putting this all on PCB, I'd like to see about using a small PC power supply which should give me some nice steady source of power, and then keep to the 0.1s near the ICs where I need to filter out any switching noise.

TL;DR: Think of my understanding of capacitors as just slightly above a grade-school level.
- I get that there is a difference between electrolytic (polarized) and ceramic caps (not-polarized). (I'm sure there are other things too)
- I get that the farads are (roughly) a representation of how much/quickly those caps can store and dissipate power. How this works, I have no idea. If you have any good, easy to understand for my two brain cells, material I can learn I'd love to read/watch it.

(No I'm not going to get a 1 farad cap for my projects, I'd like to keep my limbs intact. )

- I get that the voltage value of a cap is the limit of tolerance the cap can handle, but isn't really the voltage that is actually stored in that cap. (Kinda)
- Finally, I know very little about them.

The analog side of electronics has been a lot more baffling to me. Part of the reason why I mostly stuck with software I think, the digital side of things has always been very clear to me.

There's definitely a trade-off. One approach I've used instead is to put the capacitor between the VCC pin and the breadboard column to the left of it, and then connect that column back to the IC's ground pin, either around the lower edge, over the top of the IC, or even underneath the IC. It is very fiddly. Long-leaded capacitors may be able to stretch over the whole IC but there's a very high risk of shorting, this is why I tend to use insulated wire to complete the connection to ground (when I bother at all).

I think at this point people split into two camps - one says don't use breadboards, use wire wrap or make PCBs; the other says, keep using breadboards but be aware that you're likely to suffer some difficult debugging from time to time. Personally I've found this to be not as bad as people imply it will be, but everyone's experiences vary. I've certainly had a fair few occasions where things aren't working well, and the oscilloscope shows periodic fluctuations in signal or VCC levels compared with ground, and occasions where I've had problems with reflections on my clock causing double-counting and things like that - in these cases series or parallel termination has helped. But for sure, to some extent if you go this route and still want to achieve things like VGA clock frequencies, on a breadboard, you will need to be prepared to debug issues without many clues as to what's actually wrong.


On a PCB, for sure there are best practices that make a lot of sense. My feeling on a breadboard is that there are so many other things to go wrong that are beyond your control, there's a limit to how careful it's worth being with decoupling. But probably not a popular viewpoint!

I have seen definite benefits to having bulk capacitance on every breadboard power rail, and providing power to each power rail from a direct "star" topology connection to the power supply rather than daisy-chaining them (or at least minimising the daisy-chaining). 4.7uF is quite small for this purpose though, I use 100uF-330uF (whatever I have available).


Up to a few MHz I don't think any of this matters very much so long as the clock lines are clean, and as BDD said using slower logic families (edges specifically) can help. Most other signals in your circuit will get sampled on the edges of the clock, and any time taken for them to settle down and stop ringing doesn't matter too much at low clock rates. This is for me the main mitigation for dealing with these things on a breadboard. For things that have to be at specific faster rates (are you doing VGA, as you're using a 25.175MHz oscillator?) you need to take a bit more care with those signals, keep an eye on them with an oscilloscope, and watch out for other things being affected by them (e.g. power/ground levels spiking on clock transitions, which can affect unrelated nearby ICs). And for things that are edge-triggered you need to make sure they transition cleanly without ringing too much. It is a lot to keep an eye on.

Regarding your specific problem here, I tried to read the schematic but couldn't really follow it, due to the issues others have mentioned. It didn't stand out a being wrong, but the address decoding is quite complex. My main advice is to try to simplify the circuit and see if it still goes wrong. You've already tried removing the 65C51, and it appears to prevent the problem, which is great. It still may or may not be the actual cause. BDD's point about F-series voltage levels is important. I'd also wonder whether it's something silly like the 65C51 causing an interrupt which you're not handling - have you tried disconnecting its IRQ line? Otherwise, assuming it is the 65C51, the main candidate would probably be that it is driving the data bus when it's not meant to be selected, which comes back to the address decoding again. If you have a digital oscilloscope, setting it to trigger on the 65C51's chip select and capture also the clock and maybe some address lines, might show up some oddness in that signal.

Another thought is that if it doesn't matter what kind of UART you put in your circuit there, does it matter if you put something else entirely? e.g. a bus transceiver, enabled by the same CS line, which drives the data bus whenever the UART's CS is asserted. You can make it drive the data bus to $00, the opcode for BRK, and it will be very obvious if this is happening at the wrong times.

Definitely agree. I'm too clumsy and I've already shorted a few things and roasted them. (My poor PS/2 keyboard! (oh well, guess it's time to give those cherries I have lying around an excuse to live! ) )



For sure, 4.7 is what I had available, which at first I grabbed from an old Radio Shack electronics lab. I can get a few bigger ones if need be.



Yea, the 6.3MHz is right around the limit of what I can do with my EEPROM, so that's what I've stuck with. It feels like it would be slow enough to not cause too much trouble, and as I mentioned, things didn't seem to improve any when I dropped the clock closer to 1.5Mhz (25.175 / 16). I want to say I caught it doing this nonsense when I was single stepping the clock by hand, but I'm not 100% sure of that. I do have a 1MHz oscillator I can also throw on there for good measure, or I can just whip up an astable 555 circuit. I have plenty of those lying about.



The plan is to do some video projects with a few of the older monitors I have which accept a 15-pin VGA yes.



Good question, I have not physically disconnected the IRQ line, but I have turned off interrupts on the CPU. The NMI pin is tied high, so I don't think those are the cause. Perhaps somewhat ironically I did not see this behavior until I started trying to use interrupts and was wondering why everything was behaving oddly, so I started stripping my code down to the bare bones. Which is how I ended up with just a simple program that just does a 16-bit count in the zero page.

No interrupts, no use of the UARTs, just the 16-bit count in ZP, and writes to the 65C22 to display to the LCD module.



This was my suspicion as well. I tried putting the scope and setting a low going trigger on the CSB line which is what I'm using to drive them, and I don't even so much as see a ripple on it. :/
I think I got this right, but I'm a complete beginner when it comes to using scopes.



I did try a 470 ohm resistor pack and drove the bus high and low with that, but nothing misbehaved. (Of course though, anything else asserting to the bus would just ignore the resistors)

I will definitely give the bus transceiver a try!

Thank You.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Sure.

This is the code with all the fluff stripped down and is what I'm running right now.

I'm using the WLA assembler as that was the first thing I came across when playing with some SNES stuff.

Something else to consider for debugging is Dave Banks's protocol decoder: https://github.com/hoglet67/6502Decoder/wiki

This lets you use a cheap logic analyser to capture the data bus and clock, and from just that data it reconstructs the universe at least as seen from the 6502. So for example you can see it diverging from what you expect it to do, and try to understand why. I've used it to capture at the same clock speed you are using.

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Yep! I know, WLA is a weird beast, but that is the correct number.

I just double checked in the binary files I've been dumping to the EEPROM and the vectors are at the top (bottom?) of the ROM where I expect them to be.

(Good catch tho, that would have been something I'd miss on my own code.)

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