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Programming the Altera EPM7160S http://forum.6502.org/viewtopic.php?f=10&t=8164 |
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Author: | AndrewP [ Tue Aug 27, 2024 6:55 pm ] | |||
Post subject: | Programming the Altera EPM7160S | |||
Because I'm like that I decided to order a couple of EPM7160STC100-10s from China. I didn't I have particularly high hopes but they a) arrived and b) can actually be programmed as '7160s in Quartus. And as it's been a long day and as I didn't feel like doing anything taxing I figured I'd post up how I tested / programmed them. Hopefully this will be useful; and also I'm absolutely open to corrections as I'm not knowledgable on CPLDs or the MAX7000s in particular. First off the programming contraption. Attachment: It was built long before I drew the schematic and that's going to go some way to explaining some odd decisions I seem to have made.But before I could I build I ran into a problem. I could not find a pinout for the '7160 in the TQFP100 package. The data-sheet labels shows pin 1 (yay!) but doesn't label what any pins actually are. Fortunately someone on the internet uploaded an extract of another document with the pinouts for all the '7160 packages. I've attached it to this post. And drawn up a basic pin out picture: Attachment: I used the above to wire the stripboard together.I've since reverse engineered it into this: Attachment: It's pretty simple. 5V to all VCCIOs and VCCINTs, GND to GND and a 12V switch to OE1. A 12V 250ms pulse (or longer) on OE1 should revert the JTAG pins back to TCK, TDO, TMS and TDI if they had been changed to I/Os.OE1 should not be brought to 12V unless GND, VCCIO and VCCINT are connected and powered. And really that's about it. I use a USB Blaster (Rev.C) connected to the JTAG header connected to Quartus II 13.0sp1 for testing and programming. I was fortunate enough to not receive any chips with the lock fuse set but I suspect that it should be possible unlock the JTAG pins (if locked) and then use Quartus to erase / overwrite everything on the chip - including the lock. (I chose the EPM7160STC100 for a couple of reasons: TQFP100 chip carriers are pretty easy to source, the '7160 has 160 macro cells, 80 IO pins and - most importantly - not a lot of projects seem to use them. I also bought some EPM7128SLC84s and was not so lucky with them)
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Author: | jds [ Wed Aug 28, 2024 1:55 am ] |
Post subject: | Re: Programming the Altera EPM7160S |
I've always programmed these type of devices in-circuit as this seems easier. For a start I always assume that I'll need to reprogram it at some stage. The power supply pins are all set up anyway, so it's just a matter of adding a JTAG connector. It is possible, but a little harder, to have dual-uses for the JTAG pins, but I've left them alone, which also means that I don't need 12v. |
Author: | plasmo [ Wed Aug 28, 2024 2:08 am ] |
Post subject: | Re: Programming the Altera EPM7160S |
I have a number of EPM7064STC100 salvaged from pc board scraps. I have built a prototype board to check them out. They appeared to work fine. EPM7160STC100 should have the same pin assignments as EPM7064STC100. If you are interested in the prototype board, you can find the design files here including Gerber artwork as well as example CPLD design files. https://www.retrobrewcomputers.org/doku ... o:protorc4 Bill PS, I seldom do manual routing, but in this case I decided to manual route with curved traces. It is kinda cute. ;-) Attachment:
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Author: | AndrewP [ Wed Aug 28, 2024 12:42 pm ] |
Post subject: | Re: Programming the Altera EPM7160S |
jds wrote: I've always programmed these type of devices in-circuit as this seems easier. That's a much better idea - and I shall definitely be adding JTAG headers to my boards in the future. Unfortunately for this I needed to test the ICs before I soldered them as I wasn't convinced I would receive real ones.plasmo wrote: The EPM7160STC100 should have the same pin assignments as EPM7064STC100. https://www.retrobrewcomputers.org/doku.php?id=builderpages:plasmo:protorc4 Thanks, that was useful. Looks like they are the same. At least all the power pins, JTAG pins and input pins. The I/Os don't look the same. Or at leas the LABs are different. As Quartus just uses pin numbers I'd guess it would still work. (ps: I don't know what LABs are other than that they some sort of grouping of logic blocks or something)plasmo wrote: PS, I seldom do manual routing, but in this case I decided to manual route with curved traces. It is kinda cute. I really like curved tracks, I like to think the electrons are yelling 'Wheee!' as they go around them
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