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| WDC65C02 instructions http://forum.6502.org/viewtopic.php?f=10&t=7376 |
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| Author: | kakemoms [ Mon Oct 24, 2022 5:18 pm ] |
| Post subject: | WDC65C02 instructions |
Hi, I have almost finished modifying the 6502/65C02 core by Arlet/David/Ed include the WDC instructions, but I am having some problems understanding how WAI and RDY works. In the WDC datasheet it is stated: "The WAI instruction pulls RDY low signaling the WAit-for-Interrupt condition, thus RDY is a bi-directional pin. On the W65C02 hard core there is a WAIT output signal that can be used in ASIC's thus removing the bi-directional signal and RDY becomes only the input. In such a situation the WAI instruction will pull WAIT low and must be used external of the core to pull RDY low or the processor will continue as if the WAI never happened. The microprocessor will be released when RDY is high and a falling edge of PHI2 occurs. This again assumes the processor control setup time is met. The RDY pin no longer has an active pull up." I thought that the WAI was mostly used to set the processing in a low power state with a very low frequency, but it sounds like the processor actually stops (no clock?) until an interrupt occurs. If so, what does "assumes the processor control setup time is met" really means? And will pulling RDY low actually affect the internal clock or just stop execution? I am slightly confused here. |
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| Author: | BigEd [ Mon Oct 24, 2022 5:30 pm ] |
| Post subject: | Re: WDC65C02 instructions |
I think the note about setup time is a note about the RDY input being a synchronous input - unlike the interrupts, it needs to change some little time away from the clock active edge. Some minimum time before the active edge, if we're talking about setup time. I'd be mildly interested to know whether WAI has any effect at all on power consumption - it might. I think the main point is that WAI gives the software the fastest possible response to an input event - within one clock cycle. Whereas any kind of BIT followed by a branch back in a tight loop could take several clock cycles. An interrupt will take even more. |
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| Author: | BigDumbDinosaur [ Mon Oct 24, 2022 6:45 pm ] |
| Post subject: | Re: WDC65C02 instructions |
kakemoms wrote: ...I am having some problems understanding how WAI and RDY works... Unfortunately, the data sheet muddles the description of a feature that is implemented by two separate mechanisms. When RDY is driven low, the MPU will stop on the next fall of the Ø2 clock. Note that the “Ø2 clock” is the clock signal from the oscillator that is driving the MPU’s clock input. The MPU will maintain its internal clock in the high phase until RDY is driven high. Implied by that is while stopped in that fashion, the MPU will maintain all outputs in the high-phase state, e.g., D0-D7, RWB, etc. As long as RDY remains low, the MPU will, in effect, ignore the Ø2 clock. Once RDY has gone high, the MPU’s internal clock will re-synchronize with Ø2 and the MPU will restart on the next fall of Ø2. WAI does in software what externally driving RDY low does in hardware, but with a twist. When WAI is executed, the MPU will halt on the next high-to-low Ø2 transition and remain stopped until a hardware interrupt occurs. Again, the MPU’s internal clock will be stopped in the high phase. In the standard 65C02 package, RDY is internally “wired” so it is driven low when WAI takes effect—this is what actually halts the MPU. Hence RDY is a bi-directional signal and for that reason, should not be directly connected to VCC. If RDY is prevented from going low when WAI is executed, the MPU will not stop. If the 65C02 is provided as a core, rather than a packaged MPU, RDY is an input only and a separate output controlled by WAI is provided. In this case, the WAI output has to be connected to the RDY input in order for WAI to actually stop the MPU. An external pullup resistor connected to RDY is also required, same as with the packaged MPU. |
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| Author: | BigEd [ Mon Oct 24, 2022 6:54 pm ] |
| Post subject: | Re: WDC65C02 instructions |
I read the datasheet... feel no wiser! Would be good if someone was in a position to try WAI and see if there is any effect on power. It's really not clear to me if the point of WAI is to wait for an interrupt or to wait for RDY to be taken high externally. I don't think an interrupt can have any effect, anyway, until RDY is taken high. |
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| Author: | kakemoms [ Mon Oct 24, 2022 7:50 pm ] |
| Post subject: | Re: WDC65C02 instructions |
Thank you for the feedback. Ok, then it is at least obvious that I should have a separate WAI output, so I have added that. RDY was already in the model, so assuming it works as it should, the WAI can be fed back into RDY from outside of the module. I was hoping that WAI also reduced power consumption, but maybe that is not correct. WDC used to have a patent for reducing the clock frequency to save power, so I though that was one of the reasons for using WAI... It would be interesting to see some test results. |
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| Author: | BigDumbDinosaur [ Mon Oct 24, 2022 10:53 pm ] |
| Post subject: | Re: WDC65C02 instructions |
BigEd wrote: I read the datasheet... feel no wiser! Would be good if someone was in a position to try WAI and see if there is any effect on power. The MPU's internal clock is completely halted by WAI, same effect as if Ø2 has been stopped. MPU power consumption is reduced to microwatts while WAIting. I have verified this behavior on my POC V1.2 unit (running at 20 MHz) by executing a program that disabled all sources of interrupts, except the NMI panic button, and then executed WAI. Meanwhile, I was monitoring the unit’s power consumption (I don’t have a practical way to measure only the MPU’s power usage). When I ran the program, system power consumption was measurably reduced until I pressed the NMI button to interrupt the MPU and resume operation. Quote: It's really not clear to me if the point of WAI is to wait for an interrupt or to wait for RDY to be taken high externally. I don't think an interrupt can have any effect, anyway, until RDY is taken high. WAI's intended target is an embedded application in which the MPU may spend a long time waiting for something to do. It would make sense in such an application to simply halt the MPU in a way that can be easily reversed by an external signal, rather than allowing the MPU to spin in a loop and waste power. If RDY is externally held low, a hardware interrupt will not resume processing. If RDY is driven low as a consequence of executing WAI, an interrupt will resume processing on the next fall of Ø2. |
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| Author: | BigEd [ Tue Oct 25, 2022 6:55 am ] |
| Post subject: | Re: WDC65C02 instructions |
Oh, I see - thanks! An easy way to stop the clock and have it restart is indeed useful for many battery powered applications. |
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| Author: | kakemoms [ Sat Nov 18, 2023 8:13 am ] |
| Post subject: | Re: WDC65C02 instructions |
Just to add a small note: I recently used a 7555 timer (ICM7555IPAZ-ND) that uses just a few microamps of power. If you want a circuit with an external timer to punch the 65C02 RDY signal, this nicely lines up with WAI to reduce the total system power usage. You may want to remove the microswitches below, but then again you may want to keep them to adjust timings during development: Attachment: Power-saver.png [ 14.59 KiB | Viewed 3978 times ] |
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