Hi,

I have almost finished modifying the 6502/65C02 core by Arlet/David/Ed include the WDC instructions, but I am having some problems understanding how WAI and RDY works. In the WDC datasheet it is stated:
"The WAI instruction pulls RDY low signaling the WAit-for-Interrupt condition, thus RDY is a bi-directional pin. On the W65C02 hard core there is a WAIT output signal that can be used in ASIC's thus removing the bi-directional signal and RDY becomes only the input. In such a situation the WAI instruction will pull WAIT low and must be used external of the core to pull RDY low or the processor will continue as if the WAI never happened. The microprocessor will be released when RDY is high and a falling edge of PHI2 occurs. This again assumes the processor control setup time is met. The RDY pin no longer has an active pull up."

I thought that the WAI was mostly used to set the processing in a low power state with a very low frequency, but it sounds like the processor actually stops (no clock?) until an interrupt occurs. If so, what does "assumes the processor control setup time is met" really means? And will pulling RDY low actually affect the internal clock or just stop execution?

I am slightly confused here.

I think the note about setup time is a note about the RDY input being a synchronous input - unlike the interrupts, it needs to change some little time away from the clock active edge. Some minimum time before the active edge, if we're talking about setup time.

I'd be mildly interested to know whether WAI has any effect at all on power consumption - it might.

I think the main point is that WAI gives the software the fastest possible response to an input event - within one clock cycle. Whereas any kind of BIT followed by a branch back in a tight loop could take several clock cycles. An interrupt will take even more.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

I read the datasheet... feel no wiser! Would be good if someone was in a position to try WAI and see if there is any effect on power.

It's really not clear to me if the point of WAI is to wait for an interrupt or to wait for RDY to be taken high externally. I don't think an interrupt can have any effect, anyway, until RDY is taken high.

Thank you for the feedback.

Ok, then it is at least obvious that I should have a separate WAI output, so I have added that. RDY was already in the model, so assuming it works as it should, the WAI can be fed back into RDY from outside of the module.

I was hoping that WAI also reduced power consumption, but maybe that is not correct. WDC used to have a patent for reducing the clock frequency to save power, so I though that was one of the reasons for using WAI... It would be interesting to see some test results.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

Oh, I see - thanks! An easy way to stop the clock and have it restart is indeed useful for many battery powered applications.

Just to add a small note:

I recently used a 7555 timer (ICM7555IPAZ-ND) that uses just a few microamps of power.

If you want a circuit with an external timer to punch the 65C02 RDY signal, this nicely lines up with WAI to reduce the total system power usage.

You may want to remove the microswitches below, but then again you may want to keep them to adjust timings during development: