Hi
CPLD's combined with the 6502 are definitely the way to go. I'm using the (obsolete) MAX7000 series, but they are compatible with the Microchip ATF15xx series which are still available. I use Quartus II 13.0.1 for schematics, compiling and programming of the MAX 7000 series, but I found the latest version of Quartus II better for simulation. Simulate small chunks of your design and then combine them in a final schematic for testing on hardware.
I've started work on a SPI to SD card interface. This is my progress so far.
The current hardware supports
1. MSB first
2. selectable clock frequency
3. polling for TX complete
4. SPI MODE 0
There is still plenty of space in the CPLD for more features.
I have included some information
1. the plug-in card with the CPLD and SD card
2. the CPLD schematic
3. Logic analyzer trace with SD card CMD0 command / response
Here is some C code that I have been testing with,
Code:
unsigned char SPI_Write_Byte(unsigned char b)
{
unsigned char temp;
POKE(0xDEA1,b); // load SPI data byte
POKE(0xDEA2,0); // generate SPI write pulse, data byte is don't care
do
{
temp = PEEK(0xDEA0);
}while((temp & 0x08) == 0x00); // polling for TX complete
return(PEEK(0xDEA1)); // read data received on MISO
}
Code:
unsigned char SD_Send_CMD0(void)
{
unsigned char res;
unsigned char SD_Cmd[MMC_CMD_SIZE];
char WrkSpc[40];
ACIA_Print("CMD0",WITH_CRLF);
SD_Cmd[0] = 0x40; // CMD0
SD_Cmd[1] = 0x00;
SD_Cmd[2] = 0x00;
SD_Cmd[3] = 0x00;
SD_Cmd[4] = 0x00;
SD_Cmd[5] = get_CRC(SD_Cmd,5); // 0x95
POKE(0xDEA0,0x14); // select SPI CS0 and clock speed
SPI_Write_Buffer(SD_Cmd, MMC_CMD_SIZE );
res = SD_Read_Res1();
POKE(0xDEA0,0x00); // de-select SPI CS
utoa(res,WrkSpc,16);
ACIA_Print(WrkSpc,WITH_CRLF);
return(res);
}
Reading and writing is as fast as the 6502 can access memory.
I need to increase the CPLD clock. It is currently 10MHz, but I lost speed due to to the arrangement of logic to drive the SPI clock and MOSI shift register.
If anybody has any input or want more information please feel free to ask.
Regards
Andre
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