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PostPosted: Sun Feb 13, 2022 9:30 pm 
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Joined: Sun Sep 08, 2013 10:24 am
Posts: 740
Location: A missile silo somewhere under southern England
Hi guys

I'm still shuffling along with my Blue816 65816 design - almost there, though.
Presently, I'm running tests on my CPLD logic in WinCUPL + WinSim and have run into (hopefully just) a possible simulation snag and was wondering if anyone has encountered this before.
I have two 8 bit latches (used as registers) that I want to use which both read their value from, and write their value to, the data bus. When I try to simulate it I find the the output to the databus is always low. If boil the design down to what is needed to test this, the simulator still has the same issue, but when I write the JED file into an actual ATF1508AS it *seems* to behave correctly, but I'm not entirely trusting of it.

For those familiar with ATF1508AS / WinCUPL / Abel, is the follow the correct way of doing this (I added pin numbers in for the actual device testing) / have you encountered this and know of any possible gotchas previously doing the same? I'm at the stage where I've all but completed the CPLD and am about to fix the pin numbers, so want to be sure of this.

Code:
Name       Test;
Partno     C;
Date       01/01/2022;
Revision   01;
Designer   mjkd;
Company    None;
Assembly   None;
Location   None;
Device     f1508ispplcc84;

property   atmel {cascade_logic  on   };
property   atmel {fast_inlatch   on   };
property   atmel {foldback_logic on   };
property   atmel {logic_doubling on   };
property   atmel {optimize       on   };
property   atmel {output_fast    off   };
property   atmel {pin_keep       off   };
property   atmel {preassign      keep   };
property   atmel {security       off   };
property   atmel {xor_synthesis  off   };



Pin 2 = iPHI2;   /* Fixed pin 2:  Main CPU clock (GCLK2) */
Pin 12 = iRWB;   /* Fixed pin 12: CPU read/!write        */


/* Data bus pin */
Pin 20 = ioD;

/* inputs to indicate which latch to read from or write to */
Pin 21 = OptdataselA;
Pin 22 = OptdataselB;

/* Latches */
Pinnode = LatchA;
Pinnode = LatchB;


/* write to or read from latch A */
LatchA.L = ioD;                           /* connect latch A to the data pin */
LatchA.LE = iPHI2 & OptdataselA & !iRWB;      /* latch data to latch A if latch A selected and we're writing */
LatchA.OE = OptdataselA & iRWB;               /* allow latch A output if latch A selected and we're reading */

/* write to or read from latch B */
LatchB.L = ioD;                           /* connect latch B to the data pin */
LatchB.LE = iPHI2 & OptdataselB & !iRWB;      /* latch data to latch B if latch B selected and we're writing */
LatchB.OE = OptdataselB & iRWB;               /* allow latch B output if latch B selected and we're reading */

ioD = (LatchA # LatchB);                  /* connect the data pin to the output of both latches */
ioD.OE = (OptdataselA # OptdataselB) & iRWB;   /* enable the data pin output if we're reading and one of the latches is selected */


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PostPosted: Sun Feb 13, 2022 9:39 pm 
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Joined: Fri Jul 09, 2021 10:12 pm
Posts: 741
Don't you want:

Code:
ioD = (LatchA & OptdataselA) # (LatchB & OptdataselB)


Maybe you could post your .si file to make it clearer what behaviour you're hoping to get though.


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PostPosted: Sun Feb 13, 2022 11:12 pm 
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Joined: Fri Jul 09, 2021 10:12 pm
Posts: 741
Thinking about it more, you might also need to use ".IO" to read the input state of a tristate pin but I'm not sure. Here's an example that works for me, based on yours but cut back quite a bit and extended to provide 8-bit registers as I think that's what you said in your main text:

PLD file:
Code:
Name     latch8;
Date     13/02/2022;
Revision 1;
Designer gfoot ;
Company  gfoot ;
Assembly None;
Location None;
Device   f1508ispplcc84;
PartNo   C;

/* inputs */
pin = iPHI2;
pin = iRWB;
pin = OptdataselA;
pin = OptdataselB;

/* in/out */
pin = [ioD0..7];

/* intermediates */
pinnode = [LatchA0..7];
pinnode = [LatchB0..7];

/* fields */
Field ioD = [ioD0..7];
Field LatchA = [LatchA0..7];
Field LatchB = [LatchB0..7];

/* latch A input */
LatchA.L  = ioD.IO;
LatchA.LE = iPHI2 & OptdataselA & !iRWB;

/* latch B input */
LatchB.L  = ioD.IO;
LatchB.LE = iPHI2 & OptdataselB & !iRWB;

/* combined latch output */
ioD = (OptdataselA & LatchA) # (OptdataselB & LatchB);
ioD.OE = (OptdataselA # OptdataselB) & iRWB & iPHI2;


Simulator input file:
Code:
Name     latch8;
Date     13/02/2022;
Revision 1;
Designer gfoot ;
Company  gfoot ;
Assembly None;
Location None;
Device   f1508ispplcc84;
PartNo   C;


ORDER: iPHI2, " ", iRWB, " ", OptdataselA, OptdataselB, " ", ioD0..7, " ", LatchA0..7, " ", LatchB0..7;


VECTORS:
0 0 00 ZZZZZZZZ ******** ********
0 0 10 ZZZZZZZZ ******** ********
0 0 01 ZZZZZZZZ ******** ********
0 1 10 ZZZZZZZZ ******** ********
0 1 01 ZZZZZZZZ ******** ********

1 1 10 LLLLLLLL LLLLLLLL LLLLLLLL
1 1 01 LLLLLLLL LLLLLLLL LLLLLLLL
1 0 10 01010101 LHLHLHLH LLLLLLLL
1 0 01 10101010 LHLHLHLH HLHLHLHL
1 1 10 LHLHLHLH LHLHLHLH HLHLHLHL
1 1 01 HLHLHLHL LHLHLHLH HLHLHLHL


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PostPosted: Mon Feb 14, 2022 8:55 am 
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Joined: Sun Sep 08, 2013 10:24 am
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Location: A missile silo somewhere under southern England
I tried copy-pasting the file and I got a strange error in WinCUPL followed by a CTD (crash to desktop): "WINCUPL KEY IS NOT UNIQUE IN COLLECTION"
I thought it might be the last 2 lines not being a pin array, but that's not it. I'm thinking of looking for or writing a front end for WinCUPL command line as the editor is just so unstable sometimes.
In any event, I applied the major change (ioD = (OptdataselA & LatchA) # (OptdataselB & LatchB);) to my own test design and it appears to look fine now - so many thanks :) . I'll do some further testing this evening as I've got to go to work.


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PostPosted: Mon Feb 14, 2022 12:53 pm 
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Joined: Fri Jul 09, 2021 10:12 pm
Posts: 741
banedon wrote:
I tried copy-pasting the file and I got a strange error in WinCUPL followed by a CTD (crash to desktop): "WINCUPL KEY IS NOT UNIQUE IN COLLECTION"
I thought it might be the last 2 lines not being a pin array, but that's not it. I'm thinking of looking for or writing a front end for WinCUPL command line as the editor is just so unstable sometimes.

Yes, it fails at things that you shouldn't need to care about.

I recently posted in another thread a bash script I use to wrap the command line, which transformed the way I work with wincupl. It creates all the output files in a subdirectory to keep them out of the way, runs the simulator, and detects and presents errors more clearly, whether they're from the simulator or the compiler. Maybe you can use it or copy the command line, environment variable, etc into your own front end.


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