RP2350B Programmable Support Circuit for 6502 Family CPU

[anathae]

I have been consumed for the last little while with creating a 40 pin dip circuit board to 65C816S with the RP2350B.

The RP2350B has 48 GPIO pins including 8 pins that can be used for DVI output. That last bit is intended to provide a similar function to the Pi Pico boards available that do video out for vintage computers. This leaves 40 GPIO to connect to the 37 logic level pins on the 65816. A USB connection comes along for free.

Currently, it looks like I can make a board that 40 pin DIP 65816 can plug into and this board can even look like a 65816 to another board.

Once this is more complete, I intend to post it to GitHub and update this thread.

Does this sound interesting to anyone else?

[BigEd]

welcome - yes, certainly does sound interesting

[Dr Jefyll]

anathae wrote:

I have been consumed for the last little while with creating a 40 pin dip circuit board to 65C816S with the RP2350B.

The RP2350B has 48 GPIO pins including 8 pins that can be used for DVI output.

Fun idea! (And BTW welcome! )

For some of us, the appeal would be enhanced if the pin priorities could be shifted slightly. It's a fairly common lament that the '816 can't exceed 64K unless external demultiplexing circuitry is added. Perhaps you could offer a variant that directly provides a few or all of the upper address lines (A16, A17, A18 etc), thus avoiding the need for demuxing.

On the 40-pin layout, these upper address lines could replace typically unused signals such as ABORTB, MX, MLB, VPB and VPA. Or, there could be a miniature connector on your PCB from which the upper address lines could be brought out by ribbon cable to the host's memory system. (It's doubtful that anyone would want all eight upper address lines, but even that could be achieved if you were willing to trade off against the DVI feature.)

Your audience could include those intending to modify an existing 65(C)02 system or build an '816 system from scratch; also those who merely wish to toy around with a breadboard.

-- Jeff

[barnacle]

Dr Jefyll wrote:

(It's doubtful that anyone would want all eight upper address lines, but even that could be achieved if you were willing to trade off against the DVI feature.)

Because _surely_ 640k is enough for anyone, right?

I'll get my coat...

Neil

[Dr Jefyll]

barnacle wrote:

Because _surely_ 640k is enough for anyone, right?

Yes -- thank you, Neil.

Another approach would be to include a static RAM on the PCB. The upper address lines could feed the RAM directly, and there'd be no need for them to get routed to the host. All that'd have to get routed to the host is the output of an address decoder (real or software based) so the host knows when it should and shouldn't respond.

Having RAM on board would increase the project's appeal considerably, especially in the context of casual experimentation on a breadboard.

-- Jeff

[anathae]

The RP2350B has about 512kB of RAM on chip that could be made available to a 65816, and there is even the ability to provide upto 16MB of RAM in addition to a 16MB nor flash for the 65RP2350 (my name for the project. The max official speed of 150MHz, but over clocked to 400 by some brave people, and psram over QSPI is 100MHz or better. Might be possible to make a small little 6502 or 65816 computer.

My intent with the 40 pin 65816 layout was to make it something that could be added to nearly any vintage or reproduction board to provide video or peripherals my highschool self would have loved. If I was going to drop pins, I think an SDIO interface could be interesting. Currently there is one pin unused that I am trying to attach two 1-wire interface chips to for I2C and some additional GPIO pins

Anathae

[anathae]

Thank you for the welcomes.

[anathae]

Dr Jefyll wrote:

anathae wrote:

I have been consumed for the last little while with creating a 40 pin dip circuit board to 65C816S with the RP2350B.

The RP2350B has 48 GPIO pins including 8 pins that can be used for DVI output.

[...]
Your audience could include those intending to modify an existing 65(C)02 system or build an '816 system from scratch; also those who merely wish to toy around with a breadboard.

-- Jeff

Sounds like the audience I was targeting. There isn't really enough space on a .6" wide 40 pin dip to add a 40 by 40 pin switch matrix, I think, so I will likely have to redesign the PCB to support something like a Z80, 8088 or other period processors.

Anathae

[barnacle]

anathae wrote:

The max official speed of 150MHz,

I read somewhere recently - el Reg, perhaps? - that Raspberry have increased the official maximum. 250Mhz rings a bell...

Neil

[anathae]

barnacle wrote:

anathae wrote:

The max official speed of 150MHz,

I read somewhere recently - el Reg, perhaps? - that Raspberry have increased the official maximum. 250Mhz rings a bell...

Neil

The speed increase is also my recollection as well but, I have been looking for an official page I could reference and my search for is failing. /Tin hat mode/ Almost like the search engines have stopped generating good results to push people to engaging the LLM due site.

Anathae

[AndrewP]

Having the full 24 address lines broken out would be awesome. I really like the idea of '816 compatible RP2350B; it would make starting with the '816 so much more accessible. Although I might sacrifice the DVI interface for a UART and some address decoding chip enables. Or make them an addressable GPIO device visible to the '816.

The Pico 2 - apparently - overclocks really well but I haven't gotten my hands on one yet.

[anathae]

anathae wrote:

barnacle wrote:

anathae wrote:

The max official speed of 150MHz,

I read somewhere recently - el Reg, perhaps? - that Raspberry have increased the official maximum. 250Mhz rings a bell...

Neil

The speed increase is also my recollection as well but, I have been looking for an official page I could reference and my search for is failing. /Tin hat mode/ Almost like the search engines have stopped generating good results to push people to engaging the LLM due site.

Anathae

In the release notes about three weeks ago at the time of this post, the maximum official speed was raised to 200MHz, but only for the RP2040, not the RP2350.

Apparently my search skills have improved.

Anathae

[anathae]

AndrewP wrote:

Having the full 24 address lines broken out would be awesome. I really like the idea of '816 compatible RP2350B; it would make starting with the '816 so much more accessible. Although I might sacrifice the DVI interface for a UART and some address decoding chip enables. Or make them an addressable GPIO device visible to the '816.

I could provide an option to break out the top eight bits of the full address at the expense of the DVI connection. This could either be a separate breakout port on the board to provide the eight pins, or perhaps using the USB-C connection that I've currently got plumbed in and make an adapter that takes the HSTX pins and allows you to plug that into a board interface.

If I can get the one wire interface working there are ways of increasing the number of GPIO pins available.

AndrewP wrote:

The Pico 2 - apparently - overclocks really well but I haven't gotten my hands on one yet.

Over clocking is awesome, when it works. I need to make sure that it works enough at max official speed before proceeding to go beyond prototyping. I intend to release the design files open source, so that even if I never make more than a couple of prototypes for my own use, others can fiddle around on their own.

Anathae

[anathae]

Part of my design parameters is that the resulting board can be interposed between any board that has a 40 pin DIP socket and what ever 40 pin 6500 series processor was in the system originally.

This design choice limits the amount of space available for the initial PCB. Currently, I've planned to have a flash chip for firmware for the RP2350, as well as a PSRAM chip (8MB as it's not too expensive and is actually the largest available at digikey.ca.

If there is a desire for a "glue" chip that can be used with the 65816 that provides a complete 24 bit address bus that would be a different project. I can see a couple of ways of doing that. Buffering data and address bus lines, with address line demultiplexing, from the CPU to RAM. Targeting a particular size RAM chip, providing the CSB, OEB or similar required to select between chips. Provide a 65816 to QSPI memory interface that allows up to two 8MB QSPI chips to be seen by the 65816 as if it was 16MB of contiguous 8 bit address RAM.

I am interested in thoughts.

Anathae.

[barnacle]

Ah, so your intent is that the 65xxx plugs into the pico board, and the pico board plugs into the original socket, with extra magic on the pico board carrier? If so, you'll need extra circuit board anyway; the rp2040 is on 0.7" pin row spacing and I assume the rp2350 also.

Or do you envisage a completely new system using the processor itself but not the pico board?

Neil