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Octal D latch on ATF1508AS
http://forum.6502.org/viewtopic.php?f=10&t=6694		 Page 2 of 2
Author:  BigDumbDinosaur [ Mon Jul 19, 2021 7:36 pm ]
Post subject:  Re: Octal D latch on ATF1508AS
gfoot wrote:
That's interesting, that its better to use buried logic in addition to outputs, do you have any more information on what effect it has and when to do it?

Depending on the device, if you use outputs to drive inputs, the pin-to-pin prop delay (tPD) may get into the picture and the input may not see the change of state until tPD nanoseconds after the output has reacted to the original input. To some degree, you would be cascading prop delays and the true tPD will be longer than that claimed by the manufacturer.

Quote:
Is it just generally bad to use output values as inputs at all?

It's not "bad" or "good." It comes down to how much prop delay you are willing to tolerate.

In the case of using an SPLD (GAL), you may have no option but to use an output to drive an input in cases where logic is dependent on the results of other logic. That means using a pin as a node, even though the node may not be a useful output in itself.

In a CPLD, you can do the same thing without having to dedicate a pin as a node. CPLDs have ability to feed back an output into the logic fabric without the full tPD delay that a GAL would incur. However, "storing" intermediate results in a buried node is faster, about five to six times faster in an Atmel (Microchip) CPLD. For that reason, I don't make my logic dependent on the state of an output.
Author:  banedon [ Mon Jul 19, 2021 11:55 pm ]
Post subject:  Re: Octal D latch on ATF1508AS
BigDumbDinosaur wrote:
Please see the attached, containing your logic source file, a simulation file and the rest of the entourage. I suggest you compile and simulate it without any editing to verify it's all working. You can then play around with it—but be sure to make a backup copy...just in case.

After a successful compile, you should read the .FIT file for details on how the fitter synthesized your design into the CPLD. Also, read the .PIN file for a complete list of pin assignments.

Some things to watch for in CUPL. Although the language is supposedly case-sensitive, two variables with identical names but opposite cases will confuse the compiler.

Secondly, in the header of the source file, the field named Revision was named Rev. You can omit header fields. However, I don't advise renaming fields, as neither the compiler or simulator will like it.

I reduced the scope of your source file to four bits of extended address decoding (A16-A19) so it would be easier for you to see how selection of the different RAMs is done based upon the effective address. Once it's all clear to you you can fix it up to handle all eight bits of extended addressing.

There are notes in the file to explain some of what I did. :D Also, some belatedly-discovered typos in the comments, but not in the source code. :oops:

Attachment:
banedon.zip


That looks fantastic. I've had a quick look, but will have a more thorough one tomorrow.
Author:  banedon [ Tue Jul 20, 2021 6:52 pm ]
Post subject:  Re: Octal D latch on ATF1508AS
That's all working and simulating fine - so thank you very much. Oddly, it still comes up with the 3 simulation warnings, but nothing in the files shows an issue. Either way, all good.
I was wondering what the effect of enabling output_fast (so fast output slew) is? I know you normally leave it set to off (slow) during testing etc, but is it worth enabling afterwards?

[edit] Found:
"For speed management, each output has an individual
slew rate control. A slower output slew rate will reduce
overall system noise. All outputs default to the slower slew
rate, and outputs which need to switch at the faster rate
must be specified in the design file.".
So enabling it means more noise (same issue as having AC/ACT parts over HC/HCT?), but faster level change response?

Also, just getting a test PCB made for ATF1508AS - I suspect I may have gotten carried away a bit...
Attachment:
atf1508AS adapter.gif
atf1508AS adapter.gif [ 127.45 KiB | Viewed 2703 times ]
Author:  BigDumbDinosaur [ Tue Jul 20, 2021 7:17 pm ]
Post subject:  Re: Octal D latch on ATF1508AS
banedon wrote:
That's all working and simulating fine - so thank you very much. Oddly, it still comes up with the 3 simulation warnings, but nothing in the files shows an issue. Either way, all good.

What are the simulation warnings you are getting? It simulated without incident on my old Windows XP box.

Quote:
I was wondering what the effect of enabling output_fast (so fast output slew) is? I know you normally leave it set to off (slow) during testing etc, but is it worth enabling afterwards?

You can try enabling it, but I doubt it will matter much at the speeds at which we run our systems. There is, of course, the ringing issue about which to be concerned.
Author:  banedon [ Tue Jul 20, 2021 9:39 pm ]
Post subject:  Re: Octal D latch on ATF1508AS
It compiles just finme and the simulator is fine, too. So weird. But it's WinCUPL and it's got so many oddities under more more versions of windows that I'm not surprised :lol: .

With regards the slew: yeah makes sense. I'd rather not have a ringing issue.

Attachment:
3warnings.gif
3warnings.gif [ 25.19 KiB | Viewed 2685 times ]
Author:  BigDumbDinosaur [ Wed Jul 21, 2021 12:11 am ]
Post subject:  Re: Octal D latch on ATF1508AS
banedon wrote:
It compiles just finme and the simulator is fine, too. So weird.

You need to examine the log files that are generated by the compiler to learn more about whatever those warnings may be.
Author:  banedon [ Wed Jul 21, 2021 11:48 pm ]
Post subject:  Re: Octal D latch on ATF1508AS
Here's a bit of weirdness:

I was modifying your file, compiling and simulating it without issue. I then decided to create a separate project, copy the header & initial pin assignments and the compile. So there is initially nothing other than a file call Logic.pld in the folder and that file contains:

Code:
Name       Logic;
Partno     C;
Date       17/07/2021;
Revision   01;
Designer   tst;
Company    shalewyn.com;
Assembly   None;
Location   None;
Device     f1508ispplcc84;

property   atmel {cascade_logic  on       };
property   atmel {fast_inlatch   on       };
property   atmel {foldback_logic on       };
property   atmel {logic_doubling on       };
property   atmel {optimize       on       };
property   atmel {output_fast    off      };
property   atmel {pin_keep       off      };
property   atmel {preassign      keep     };
property   atmel {security       off      };
property   atmel {xor_synthesis  off      };

/* immutable inputs */

pin      1 =   RESETB;                  /* system reset (GCLR, if needed) */
pin      2 =   PHI2;                     /* MPU clock high phase (GCLK2)   */
pin     12 =   RWB;                     /* MPU read/!write                */
pin     81 =   VDA;                     /* MPU valid data address         */
pin     83 =    PHI1;                     /* MPU clock low phase (GCLK1)    */
pin     84 =   VPA;                     /* MPU valid program address      */


This causes WinCUPL to just crash. I removed everything apart form the header and it works.
I add something like pin 11 = test; save it & compile: crashes. Try different, definite I/O only, pins with the same result.
I then uninstall and reinstall WinCUPL and go through the same steps: same thing.
Thinking it might be WIndows 10 compatibility, I install windows xp in virtualbox, install wincupl and clipboard-copy the text, save & complile: crashes.
Finally, thinking it might be hidden characters, I type the header & pin assingment, save & complile: crashes.
I go back to your file and it compiles without issue...
All along there has been no space in the file/folder names and it's not been in a user profile.
Tried the isp and non-ISP device and tried changing to the ATF1504AS isp device.
Tried removing the 'properties' lines
Tried disabling the simulator so only compiles
Tried run as administrator and windows xp compatibility mode
Oddly, if I open WinCUPL, click Open and select the Logic.pld (not your version) it says: 'The file f:\banedon1\logic.pld doesn't exist. New File assumed' then opens the file, but there is no project windows to the right. This happens in windows xp as well.
If I load in an example or another project it works fine.
Computer rebooted and antivirus disabled.

It keeps insisting that if I load the PLD file using Open or Open Project just after WinCUPL is started: 'The file f:\banedon1\logic.pld doesn't exist. New File assumed'. ALmost as if I've tried to import a file into an existing project.

These are the file produced after it complliles and then crashes to desktop:
CCxxxxxx
logic.abs
logic.oed
logic.pla
logic.pld
logic.sim
runfit.$$$

There are no errors that I can see. I've attached a copy in case anyone wants to give it a try. I'm going to bed and will look at it again with a fresh pair of eyes tomorrow. It's probably be something simple I've missed.

Attachments:
banedon1.zip [2.78 KiB]
Downloaded 73 times
Author:  BigDumbDinosaur [ Thu Jul 22, 2021 5:42 am ]
Post subject:  Re: Octal D latch on ATF1508AS
banedon wrote:
Here's a bit of weirdness...

It's late, so I will look at this in more detail tomorrow.

However, you need to add some equations that use the declared pins. Otherwise, when the fitter runs it will abort because there is nothing to fit. That is likely why the runfit.$$$ file is present. It's an intermediate file the fitter generates and erases after the fit operation has completed without error (which doesn't mean the design fits, only that the fitter ran to completion). That that file is present suggests the fitter went belly-up.
Author:  banedon [ Thu Jul 22, 2021 9:24 am ]
Post subject:  Re: Octal D latch on ATF1508AS
You are quite correct. Soooo annoying. But you live and learn (hopefully).
I have to say that although what you say makes perfect sense, and I really should have tried going beyond assigning pins, you'd think WinCUPL would give you a meaningful error message, not just CTD (even in winxp). But it's WinCUPL with all of it's "quirks". I'm almost tempted to write my own front end which calls the command line interpreter at this stage just out of sheer annoyance :lol:

Thanks for advising on this as it was driving me nuts.
Author:  and3rson [ Thu Nov 30, 2023 12:08 pm ]
Post subject:  Re: Octal D latch on ATF1508AS
banedon wrote:
Here's a bit of weirdness:

[...]

Oddly, if I open WinCUPL, click Open and select the Logic.pld (not your version) it says: 'The file f:\banedon1\logic.pld doesn't exist. New File assumed' then opens the file, but there is no project windows to the right. This happens in windows xp as well.
If I load in an example or another project it works fine.


FYI - I've just spent a ridiculous amount of time learning all of WinCupl's whims, and it all boils down to DOS vs UNIX line endings. I converted my files to DOS (CR-LF) format, and now WinCupl can open them.
Author:  BigDumbDinosaur [ Thu Nov 30, 2023 6:04 pm ]
Post subject:  Re: Octal D latch on ATF1508AS
and3rson wrote:
FYI - I've just spent a ridiculous amount of time learning all of WinCupl's whims, and it all boils down to DOS vs UNIX line endings. I converted my files to DOS (CR-LF) format, and now WinCupl can open them.

Yep!  I discovered that the very first time I tried loading a PLD file into WinCUPL that I had generated in vim.  :D  It turned out that WinCUPL has more bugs than a bed in a brothel.  :shock:
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