A light bulb went on half way into the design of proto65 v0.3; the text-based monochrome VGA logic is simple, really simple, so that it should fit in an ATF1504AS CPLD. With the help of a 4K dual port RAM, monochrome VGA with 64 columns x 48 lines of text should be possible.

Here is a back-of-envelope (literally) sketch. 6502 side of the dual port RAM is 4K read/write memory as decoded by address A15-A12 and clock. The video side of DPRAM is read-only and always enabled; it provides the font lookup table (1K-byte) and character memory (3K-byte) to the CPLD. CPLD has two cascaded counters, modulo-800 for horizontal line and modulo-525 for vertical. Horizontal sync is generated from modulo-800 counter and vertical sync is generated from modulo-525 counter.

The organization of character memory is 64 characters per line and 48 lines per frame for total of 64x48=3072 bytes. Address 0x0 corresponds to the first character of the first line (upper left corner of the display); address 0x40 is beginning of the second line, so on up until address 0xBFF as the last character of the 48th line (lower right corner of the display). Font table starts from address 0xC00 such that 0xC00-0xC07 are lookup tables for character value 0x0 and 0xFF8-0xFFF are lookup tables for character value 0x7F. Each character is represented by 8 bytes of font table.

A state machine in CPLD generates the addresses for dual port RAM starting from address 0x0; the value fetched is used to generate a font table address to lookup the font correspond to the fetch value. The font value is stuffed into a register and shifted out at 25.175MHz. The state machine generates addresses 0x0 to 0xBFF then inhibits video, generates the vertical sync then starts all over again.

This is a simple circuit, no hardware cursor, no hardware scroll, and monochrome. The prototype board contains 3 chips, 25.175MHz clock, IDT7134 dual port RAM, and ATF1504AS CPLD. $10 parts.
Bill

very nice.

extra points for using the back of an envelope

Attached is schematic of VGA6448 prototype. This will be prototyped first on a ProtoRC3. The dual port RAM is mapped to memory 0xD000-0xDFFF. Currently there are RAM in that area already, so I make the DPRAM write only from 6502 side; write to 0xDxxx will write to both DPRAM and system RAM; read from 0xDxxx will read the system RAM. I will utilize 100% of the CPLD I/O pins. A possible alternative is use a 74ACT138 to decode 6502 memory map to free up 6 CPLD I/O pins which could be use for PS/2 keyboard function. This all depends on whether there are spare macrocells after the VGA function is implemented.
Bill

Here is the VGA6448 prototype board, all wired up and even smoke tested. So far so good. I only have 3 ATF1504AS but have plenty of EPM7064S, so for hardware development I will use EPM7064S; afterward I can convert .POF file to .JED file to program ATF1504AS.

+2 points for literally using the back of an envelope.

Now put some glue on it and throw against a wall and see if it sticks. LOL

Seriously, this is a great idea. Been looking for some "easy" VGA solutions using CPLD's.

_________________
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I don't mind getting junk mails because I reuse the envelopes, and the rest can go into the fireplace. It is an expensive way of delivering paper & fuel, but it is not MY money I'm burning

This is first cut of the VGA output from VGA6448. The CPLD design is not optimal, but it still fits within the 64-macrocell EPM7064S. PS2 keyboard function is not in the design because all CPLD I/O pins are in use. An external 74138 decode may free up sufficient pins to do PS2 keyboard function. VGA6448 design is fairly generic so can be easily adopted for other 8-bit microprocessors.

The left of the picture shows a 5-slot RC2014 backplane with CRC65 (6502 SBC) in the front and VGA6448 behind.

This is a 24-second YouTube video shows the "Matrix" screensaver running on CRC65+VGA6448. The ability to read/write video RAM directly at anytime simplifies the software significantly. The "Matrix" animation code is lesser than 256 bytes.

https://youtu.be/rQiBJkjPg44

Bill

Looks good Bill, it would be nice to be able to add the PS2 keyboard interface for a standalone.

PS2 keyboard is highly desirable and I believe it is possible with the addition of 2 '138 decoders, one for the video RAM address select and the other for PS2 address select.

Multiple VGA6448 can be populated on a system; one is the system monitor & keyboard, but the others can shadow and display the activities of certain region of memory. Example, the first 2K of memory where zero page and stack are located is a region of interest.
Bill

great job. Just wondering how much work to support standard fast sram (10ns) instread of dualport sram.

Quite a bit.

The data and address busses need to be switched, and possibly latched depending on the relative speeds of the CPU and VGA clocks. Those external components need controlling by the CPLD, and that requires both pins and logic resources.

Agree, quite a bit of buffers and tranceivers are needed to turn a single-ported RAM into dual port RAM.

To brainstorm a bit on the notion of shadowing and displaying selected region of memory:

VGA6448 is really invisible to the rest of the system. It is a write-only 4K chunk of memory where 1K is font tables and 3K are display memory. It's interface looks like a memory device, 12 lower address for 4K RAM, 8 data lines (input only), chip select, write enable, but no read enable; the upper addresses selects which 4K block that's displayed. It is just a ghost memory displaying content of selected 4K region on a VGA screen.

A VGA6448 daughter board can be constructed that plugs into the system RAM socket; the daughter board is consists of the original system RAM, 4K dual port RAM, ATF1504AS CPLD, 25.175MHz osc, and VGA connector. The original system RAM is plugged back in on the daughterboard and the RAM's address, data, control, and power are now driving VGA circuits. This way a VGA capability is added by piggy backing on the existing RAM. Memory map can be programmed such that the top 1K memory is programmable font tables; the other 3K holds 64x48 character memory.

Another application for the VGA6448 daughterboard is a memory activity monitor. The font table and character memory are located in two separate regions. Font is likely located in high memory and character memory can locate anywhere in memory space. Font table needs to represent 256 values instead of 128 ASCII character values, so it is 2K in size. The character memory is also 2K. The most likely memory region of interest is first 2K where zero page and stack are located. Program can also place variables in the first 2K to facilitate memory activity monitoring.

Looks like an interesting project...
Bill

This is a really nice piece of work.

Have you considered using something like a Spartan-3A FPGA to replace both the CPLD and DP RAM combo? It's more of a challenge to solder, and requires multiple voltages, but AFAIK it's I/O can support 3.3V, which is ok for 65C02, and it gives you lots of scope for functionality.

I was generally wondering whether home-brew 65C02 builds use lower voltage standards rather than the original 5V.