6502.org Forum  Projects  Code  Documents  Tools  Forum
It is currently Sat Apr 27, 2024 2:18 pm

All times are UTC




Post new topic Reply to topic  [ 44 posts ]  Go to page 1, 2, 3  Next
Author Message
PostPosted: Wed Dec 23, 2020 6:34 pm 
Offline

Joined: Fri Dec 21, 2018 1:05 am
Posts: 1076
Location: Albuquerque NM USA
I sign up to 6502.org two years ago, but spending more time on Z80 and Z280 elsewhere. I "rediscovered" 6502.org a couple weeks ago and had enjoyed reading the many instructive postings. This place suits me and I plan to spend more time here. I don't know much about 6502 so I'm also looking forward to learn more about it here.

This being a more "techie" site, I will try something a bit unconventional: I want to build retro computers out of used, (possibly fake/rebranded) eBay parts. The challenge is not designing to the datasheet, but anticipating for the unexpected. The reason this post is under 'Programmable Logic' is because I anticipate having problematic parts and spending time debugging, so I'm depending on the programmable logic to work around the various problems. I'm comfortable around CPLD, so this is a good place to start.

I'll start with a batch of used EPM7192S purchased off eBay a decade ago. They have residual solders and some bent legs so were obviously removed from existing boards. I 'discovered' them recently in my overflowing garage and designed a prototype board for them. This is a simple proto board with EPM7192S, Altera programming header, reset supervisor (OK, confession time, the reset supervisor, MCP130, is from Mouser, but everything else is from eBay, so far...), oscillator, and header for a serial port. In the prototype area I'll place a 40-pin ZIF socket for CPU (6502 in this case), and put down a 128Kx8 RAM (specifically CY7C109-25 which I bought a reel from eBay years ago). I'll probably also install an IDE44 header for compact flash or disk-on-module. The goal for this board is a 'headless' 6502 SBC. Later on keyboard/VGA capability will be added through the expansion connector at the bottom of the board.

One step at a time, the first project is a 6502 tester to check out the random 6502 I bought off eBay.

To be continued...


Attachments:
File comment: CPLD EPM7192S prototype board
DSC_62271223.jpg
DSC_62271223.jpg [ 1.31 MiB | Viewed 7636 times ]
Top
 Profile  
Reply with quote  
PostPosted: Thu Dec 24, 2020 3:50 pm 
Offline

Joined: Fri Dec 21, 2018 1:05 am
Posts: 1076
Location: Albuquerque NM USA
Making progress on the 6502 test bed. I wired up the 40-pin ZIF socket according to 6502's pin assignment. I also wired up a 7C109 128Kx8 RAM. The RAM is not necessary at this stage of development. I only need to feed 6502 some instructions and output data over a serial port (just a 10-bit shift register) to check out the working of the 6502.

Powered up the board; LED is blinking as it should and I can program the CPLD, so I'm settling down to program the CPLD now.

Bill
Attachment:
6502_testbed_comp_side.jpg
6502_testbed_comp_side.jpg [ 999.28 KiB | Viewed 7596 times ]


Attachments:
6502_testbed_solder_side.jpg
6502_testbed_solder_side.jpg [ 914.16 KiB | Viewed 7596 times ]
Top
 Profile  
Reply with quote  
PostPosted: Thu Dec 24, 2020 6:26 pm 
Offline

Joined: Fri Dec 21, 2018 1:05 am
Posts: 1076
Location: Albuquerque NM USA
The 6502 processor is executing NOP (0xEA) instruction with 3.68MHz clock. The LED connected to A15 is flicker at 28Hz. I think that's about right.

Now I need to sit down and figure out a small program that'll output something out of the serial port and maybe do simple memory diagnostic. However, if I know what's good for me, I should put this aside for at least 24 hours and go down stair to help out in the kitchen!

Merry Christmas!


Top
 Profile  
Reply with quote  
PostPosted: Sat Dec 26, 2020 2:55 am 
Offline

Joined: Fri Dec 21, 2018 1:05 am
Posts: 1076
Location: Albuquerque NM USA
I have not written many 6502 assemblies (two programs, to be precise) and that was several years ago. The instruction tutorial page ( http://www.6502.org/tutorials/6502opcodes.html ) is very useful. So this is a tiny program in boot ROM to output a character continuously over the serial port. The bootROM is a 64-byte look up table located at 0xFF00-0xFF3F and replicated 3 more times to 0xFFFF. The reset vector at location 0xFFFC points to 0xFF00:

Code:
000000r 1               ;Write 'B' continuously to the console
000000r 1               TxData = $eff9      ;UART transmit register
000000r 1               TxStat = $eff8      ;UART transmit status
000000r 1               
000000r 1                  .ORG $ff00
00FF00  1               START:
00FF00  1  A9 42           LDA #'B'
00FF02  1  8D F9 EF        STA $eff9   ;write 'B' to serial port
00FF05  1  A2 00           LDX #0      ;delay loop
00FF07  1               SPIN:
00FF07  1  EA              NOP
00FF08  1  EA              NOP
00FF09  1  E8              INX
00FF0A  1  D0 FB           BNE SPIN
00FF0C  1  F0 F2           BEQ START


I'm getting a continuous 'B' output on the console, so things are looking good. Next is to enable the RAM and run memory diagnostic.


Top
 Profile  
Reply with quote  
PostPosted: Sat Dec 26, 2020 6:07 pm 
Offline

Joined: Fri Dec 21, 2018 1:05 am
Posts: 1076
Location: Albuquerque NM USA
The RAM is now enabled from 0x0 to 0xDFFF; serial port is at 0xEFF8 and 0xEFF9; ROM is at 0xFFFC to 0xFFFF. A small ROM program prints a character on console, tests a block of memory, and repeat. This ROM program is running and passing the memory test OK. So now I'll change the ROM program to be a bootstrap loader that loads program into memory and then jumps to the memory location afterward.

Code:
000000r 1               ;Write 'B' continuously to the console
000000r 1               TxData = $eff9      ;UART transmit register
000000r 1               TxStat = $eff8      ;UART transmit status
000000r 1               
000000r 1                  .ORG $ffc0
00FFC0  1               start:
00FFC0  1  C8              INY
00FFC1  1  8C F9 EF        STY $eff9   ;write something to serial port
00FFC4  1               
00FFC4  1  A2 00           LDX #0
00FFC6  1  8A              TXA
00FFC7  1               mwrite:
00FFC7  1  9D 00 20        STA $2000,X
00FFCA  1  E8              INX
00FFCB  1  8A              TXA
00FFCC  1  D0 F9           BNE mwrite
00FFCE  1               ;both X and A are zero here
00FFCE  1               mver:         ;verify memory
00FFCE  1  DD 00 20        CMP $2000,X
00FFD1  1               forever:
00FFD1  1  D0 FE           BNE forever   ;if error, spin forever here
00FFD3  1  E8              INX
00FFD4  1  8A              TXA
00FFD5  1  D0 F7           BNE mver
00FFD7  1  F0 E7           BEQ start


Top
 Profile  
Reply with quote  
PostPosted: Sun Dec 27, 2020 3:35 pm 
Offline

Joined: Fri Dec 21, 2018 1:05 am
Posts: 1076
Location: Albuquerque NM USA
I made a better serial port in CPLD; the receiver is double buffered. The serial port is a trimmed down version of 6850.

I changed the bootROM to a serial bootstrap loader; it put out a character to signal it is ready to receives 256 bytes of binary data and store them in 0xB000-0xB0FF and then jump to 0xB000.

With the bootstrap loader in ROM I can now serially load diagnostic or monitor or applications. The program I did load is actually a better serial bootstrap loader. It is tedious to program the ROM in CPLD; I have to manually enter each hex value from the listing, compile and program the CPLD for every little software change so I made ROM programs as small and simple as possible. Now I can leisurely write 256-byte program on my PC and download it to the target; I can even automated it with TeraTerm macro. Life is good.

Code:
000000r 1               ;load 256-byte binary file to 0xB000
000000r 1               TxData = $eff9      ;UART transmit register
000000r 1               TxStat = $eff8      ;UART transmit status, bit 0 is receive ready, bit 1 is txempty
000000r 1               
000000r 1                  .ORG $ffc0
00FFC0  1               start:
00FFC0  1  A9 52           LDA #'R'
00FFC2  1  8D F9 EF        STA $eff9   ;send out a ready byte
00FFC5  1  A2 00           LDX #0      ;initialize X
00FFC7  1               chkstat:
00FFC7  1  AD F8 EF        LDA $eff8   ;chk receive ready
00FFCA  1  29 01           AND #1
00FFCC  1  F0 F9           BEQ chkstat
00FFCE  1  AD F9 EF        LDA $eff9   ;get data
00FFD1  1  9D 00 B0        STA $b000,X
00FFD4  1  E8              INX
00FFD5  1  D0 F0           BNE chkstat   ;load 256 bytes of binary data
00FFD7  1  4C 00 B0        JMP $b000   ;start program execution



Top
 Profile  
Reply with quote  
PostPosted: Sun Dec 27, 2020 3:57 pm 
Offline
User avatar

Joined: Thu Dec 11, 2008 1:28 pm
Posts: 10793
Location: England
> With the bootstrap loader in ROM I can now serially load diagnostic or monitor or applications. The program I did load is actually a better serial bootstrap loader

Very nice! I'm fond of a multistage bootstrap process.


Top
 Profile  
Reply with quote  
PostPosted: Sun Dec 27, 2020 4:12 pm 
Offline

Joined: Fri Dec 21, 2018 1:05 am
Posts: 1076
Location: Albuquerque NM USA
BigEd wrote:
> With the bootstrap loader in ROM I can now serially load diagnostic or monitor or applications. The program I did load is actually a better serial bootstrap loader

Very nice! I'm fond of a multistage bootstrap process.


TeraTerm macro can manage the multistage bootstrapping effectively, but I can also see myself getting tired of serial file loads, especially larger file like EhBASIC. Once the hardware is working, I'll install a compact flash interface and modify the ROM so it can either bootstrap from serial port or from the CF disk.


Top
 Profile  
Reply with quote  
PostPosted: Sun Dec 27, 2020 5:32 pm 
Offline
User avatar

Joined: Thu Dec 11, 2008 1:28 pm
Posts: 10793
Location: England
For me, it's one of the good things about retrocomputing, that you can get a really good understanding of a boot process, and what needs to be done at which stage.


Top
 Profile  
Reply with quote  
PostPosted: Sun Dec 27, 2020 11:45 pm 
Offline

Joined: Fri Dec 21, 2018 1:05 am
Posts: 1076
Location: Albuquerque NM USA
Tinyload is a 256-byte Intel Hex loader that is first loaded into Proto65 and, in turn, loads other program in Intel Hex format. The particular program loaded by Tinyload in first picture is EhBASIC that was ported to Proto65. To demonstrate EhBASIC is running correctly, the 2nd picture shows it running the mandelbrot benchmark.

I have documented the current Proto65 schematic, CPLD design, and software here:
https://www.retrobrewcomputers.org/doku ... r5:proto65

The next step is adding a compact flash interface so Proto65 can boot from CF disk.

Looking further ahead, the EPM7192S is only 50% utilized at this point so other peripherals can be added. The one peripheral I have in mind is a 640x480 VGA display where 6502 access one side of a dual port RAM and the CPLD access the other side of the dual port and drive the video interface.

Attachment:
Proto65_serial_load_EhBASIC.jpg
Proto65_serial_load_EhBASIC.jpg [ 87.77 KiB | Viewed 7435 times ]


Attachment:
Mandelbrot_EhBASIC_Proto65.jpg
Mandelbrot_EhBASIC_Proto65.jpg [ 331.43 KiB | Viewed 7435 times ]


Top
 Profile  
Reply with quote  
PostPosted: Mon Dec 28, 2020 9:16 am 
Offline

Joined: Fri Oct 04, 2019 4:26 am
Posts: 19
Location: Rancho Cordova, CA
plasmo wrote:
Tinyload is a 256-byte Intel Hex loader that is first loaded into Proto65 and, in turn, loads other program in Intel Hex format. The particular program loaded by Tinyload in first picture is EhBASIC that was ported to Proto65. To demonstrate EhBASIC is running correctly, the 2nd picture shows it running the mandelbrot benchmark.

I have documented the current Proto65 schematic, CPLD design, and software here:
https://www.retrobrewcomputers.org/doku ... r5:proto65

The next step is adding a compact flash interface so Proto65 can boot from CF disk.



Bill,

Very nice. Will check out the design files.

Greg


Top
 Profile  
Reply with quote  
PostPosted: Mon Dec 28, 2020 12:33 pm 
Offline
User avatar

Joined: Thu Dec 11, 2008 1:28 pm
Posts: 10793
Location: England
(Small note: you have there the buggy version of the Mandelbrot code. See here.


Top
 Profile  
Reply with quote  
PostPosted: Mon Dec 28, 2020 3:42 pm 
Offline

Joined: Fri Dec 21, 2018 1:05 am
Posts: 1076
Location: Albuquerque NM USA
BigEd wrote:
(Small note: you have there the buggy version of the Mandelbrot code. See here.

Ah Good, you caught me just in time; I was going to rewire Proto65 to add a compact flash drive. With the correction the mandelbrot looks much better, see picture below.

Lee Davison also had written EhBASIC for 68K and I have ported it to my 680x0 hombrews. The original mandelbrot program running on EhBASIC-68K looks just like the picture below, so the variable names on EhBASIC-68K must be longer than 2 characters. Good, this solves the mystery of why mandelbrot ran differently on EhBASIC 6502 vs 68K.


Attachments:
Proto65_ehbasic_debugged_mandelbrot.jpg
Proto65_ehbasic_debugged_mandelbrot.jpg [ 360.14 KiB | Viewed 7369 times ]
Top
 Profile  
Reply with quote  
PostPosted: Tue Dec 29, 2020 1:51 pm 
Offline

Joined: Fri Dec 21, 2018 1:05 am
Posts: 1076
Location: Albuquerque NM USA
I am low on CF adapter hardware so I installed a header for disk-on-module interface, instead. DOM has the same electrical interface as CF disk except mechanically the connector is mirror of CF interface. Of course I happened to have few DOM from trusty eBay.

The memory map is now changed so internal ROM is at 0xFF00-0xFFFF; internal I/O such as serial port is 0xEF00-0xEFFF; external I/O sucha as DOM interface is 0xEE00-0xEEFF; and RAM is from 0x0-0xEDFF. When the memory-mapped VGA is installed, it will be at 0xF000-0xFFFF; ROM at 0xFF00-0xFFFF will be disabled with a register write in CPLD.

I'm able to set DOM to 8-bit mode and access it as a 8-bit parallel device. The plan is for the ROM to sample serial port receive ready or DOM ready bit and decide which device to boot from. Booting from DOM is also a multi-stage process where Master Boot Record at track 0 sector 0 is loaded into memory and run which, in turn, load and run a larger program.


Attachments:
Proto65+6502+DOM+compside.jpg
Proto65+6502+DOM+compside.jpg [ 1.37 MiB | Viewed 7340 times ]
Proto65+6502+DOM_solderside.jpg
Proto65+6502+DOM_solderside.jpg [ 1.17 MiB | Viewed 7340 times ]
Top
 Profile  
Reply with quote  
PostPosted: Wed Dec 30, 2020 10:13 pm 
Offline

Joined: Fri Dec 21, 2018 1:05 am
Posts: 1076
Location: Albuquerque NM USA
Proto65 was designed as a testbed for eBay parts including the 6502 CPU. The two eBay 6502 are labelled "W65C02S8P-10", allegedly 10MHz parts. Well, I've read enough posts here to know that's not true; while they are functional, one part is good at 3.68MHz while the other part is only good at 1.84MHz. Proto65 circuit is consists of a 25nS RAM and CPLD with 10ns prop delay so it should work well with a 10MHz 6502, likely higher. So I ordered a few W65C02-14 from Mouser and they came in this afternoon. The Mouser W65C02-14 works at 3.68MHz as it should, 7.37MHz as expected, (serial port is now 230400); and it also works at 14.7MHz with serial port at 460800. Power is not much higher, drawing 190mA @5V at 3.68MHz and 230mA at 14.7MHz. This is because EPM7192 is a power hog overshadow whatever extra power 6502 may have drawn at higher frequency. Ran the mandelbrot benchmark, it now runs in 77 seconds @ 14.7MHz.

14.7MHz is too fast for the disk-on-module drive which is operating in PIO mode. I need to work on the RDY signal and provide proper setup/hold for the disk access.
Bill


Top
 Profile  
Reply with quote  
Display posts from previous:  Sort by  
Post new topic Reply to topic  [ 44 posts ]  Go to page 1, 2, 3  Next

All times are UTC


Who is online

Users browsing this forum: No registered users and 8 guests


You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot post attachments in this forum

Search for:
Jump to: