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Help Converting ABEL to CUPL
http://forum.6502.org/viewtopic.php?f=10&t=6225		 Page 1 of 1
Author:  Shawn Odekirk [ Tue Jul 28, 2020 6:35 pm ]
Post subject:  Help Converting ABEL to CUPL
I have a circuit that uses an 18CV8 PLD for the glue logic to interface with a serial communications controller (SCC). The 18CV8 is pin compatible with the 16V8, but adds a few additional features. The 18VC8 is no longer available, so I'm trying to see if I can replace it with a 16V8. I could use some help reverse engineering the ABEL source and translating it to CUPL.
Here is the ABEL source:
Code:
        glue1 device 'P18CV8';

        CLK,A2,A1                       pin 1,2,3;
        RIC_CS,RIC_RD,LBRES             pin 4,5,6;
        RIC_WR                          pin 7;
        WREQA,DTRREQA,OE                pin 8,9,11;
        TXREQ4,RXREQ4                   pin 12,13;
        SCC_CS,SCC_WR                   pin 14,15;
        SCC_INTA                        PIN 16 ISTYPE 'REG_D,INVERT';
        SCC_RD,SCC_DC,SCC_AB            pin 17,18,19;



        C,Z,X,H,L       = .C., .Z., .X., 1, 0;

equations

        TXREQ4 = DTRREQA;
        RXREQ4 = WREQA;

        SCC_CS = RIC_CS;

        SCC_INTA.C   = CLK;
        SCC_INTA    := !SCC_INTA;
        SCC_INTA.AR  = !LBRES;

        !SCC_RD = ( !CLK * !SCC_INTA ) + (!RIC_RD * !RIC_CS);
        !SCC_WR = (!RIC_WR * !RIC_CS);

        SCC_DC = A1;
        SCC_AB = A2;

Most of it is straightforward and can be easily translated to CUPL. The part I am not sure about is SCC_INTA.

Code:
        SCC_INTA                        PIN 16 ISTYPE 'REG_D,INVERT';

        SCC_INTA.C   = CLK;
        SCC_INTA    := !SCC_INTA;
        SCC_INTA.AR  = !LBRES;

It looks like SCC_INTA is a D flip-flop. I think that translates to 'SCC_INTA.d' in CUPL.
I don't think I need to explicitly specify the clock for the flip-flop in CUPL, so I can get rid of the 'SCC_INTA.c = CLK;' line.
I believe the ':=' is 'registered assignment'. I'm not sure what that means and if there is an equivalent in CUPL.
I believe the 16V8 does not support asynchronous reset, so I'll have to figure out an alternative. The CUPL Reference mentions incorporating the reset signal in product terms for a synchronous reset. Perhaps this is an option.
Unless I am mistaken, '*' means AND and '+' means OR.
Any advice or suggestions will be greatly appreciated.

Thanks,
Shawn
Author:  Shawn Odekirk [ Wed Jul 29, 2020 12:14 am ]
Post subject:  Re: Help Converting ABEL to CUPL
I had no problem porting the ABEL source to CUPL for a 22V10, which supports asynchronous reset of a flip-flop. Unfortunately I don't think redesigning the circuit board for a physically larger chip is an option, so I'm going to have to figure out how to get this to work with a 16V8, which doesn't support asynchronous reset.
Code:
Name     test01 ;
PartNo   00 ;
Date     7/28/2020 ;
Revision 01 ;
Designer Shawn Odekirk;
Company  ;
Assembly  ;
Location  ;
Device   g22v10 ;

/* Inputs */
PIN  1 = CLK;
PIN  2 = A2;
PIN  3 = A1;
PIN  4 = RIC_CS;
PIN  5 = RIC_RD;
PIN  6 = LBRES;
PIN  7 = RIC_WR;
PIN  8 = WREQA;
PIN  9 = DTRREQA;

/* Outputs */
PIN 14 = TXREQ4;
PIN 15 = RXREQ4;
PIN 16 = SCC_CS;
PIN 17 = SCC_WR;
PIN 18 = SCC_INTA;
PIN 19 = SCC_RD;
PIN 20 = SCC_DC;
PIN 21 = SCC_AB;

/* Logic Equations */
TXREQ4 = DTRREQA;
RXREQ4 = WREQA;

SCC_CS = RIC_CS;

SCC_INTA.d = !SCC_INTA;
SCC_INTA.ar = !LBRES;

!SCC_RD = (!CLK & !SCC_INTA) # (!RIC_RD & !RIC_CS);
!SCC_WR = (!RIC_WR & !RIC_CS);

SCC_DC = A1;
SCC_AB = A2;
Author:  Dr Jefyll [ Wed Jul 29, 2020 1:33 am ]
Post subject:  Re: Help Converting ABEL to CUPL
Shawn Odekirk wrote:
I have a circuit that uses an 18CV8 PLD for the glue logic to interface with a serial communications controller (SCC).
[...] I could use some help reverse engineering the ABEL source and translating it to CUPL.

Dunno how many of our members are fluent in both ABEL and CUPL. Maybe it'd be better to put less emphasis on reverse engineering the ABEL.

With that in mind, can I suggest you share with us the actual schematic of the circuit? That'll give a lot of additional perspective. Indeed, some suitable CUPL code could probably be concocted based on the schematic alone, with no reference to the original ABEL.

-- Jeff
Author:  Shawn Odekirk [ Thu Jul 30, 2020 2:29 am ]
Post subject:  Re: Help Converting ABEL to CUPL
Unfortunately, I don't have much to go on myself. I can, however, provide a little additional information that I have been able to gather, and a timing diagram I drew.
I hope I am not cast out, but I will admit this is not a 6502 based system. I believe it is a '186 variant interfacing to an 85C230 Serial Communication Controller (SCC).
When the SCC asserts an interrupt request (SCC_INTR), the system asserts an interrupt acknowledgement (SYS_INTA). For some reason that I don't know, the system asserts, de-asserts, then reasserts the interrupt acknowledgement. Apparently the SCC doesn't like this, so the original engineers programmed a PLD to assert SCC_INTA only once. The way they did this was to use SYS_INTA as the clock to a flip-flop that toggled state on the rising edge of SYS_INTA, and used the output from the flip-flop as SCC_INTA.
There is a pin on the PLD assigned to the asynchronous reset of the flip-flop. I apologize for not including that on my timing diagram, but I don't know anything about it except that it was used in the ABEL source code.
I would have no trouble implementing this in an ATF22V10, which supports asynchronously resetting a flip-flop, but I am constrained to use the ATF16V8, which I believe does not support asynchronously resetting a flip-flop.
I have tried several things, including trying to implement this as a JK flip-flop, and at times I seem to be getting close, but I just can't quite figure out how to get the behavior depicted in the timing diagram. Basically, I would like an output to toggle state on the rising edge of an input, and be able to reset the output at any time based on another input.
I apologize that I don't have more details to provide, and I understand it is difficult to help without all of the details. I really appreciate everyone who has taken the time to read this, and if anyone has any ideas or suggestions I would really appreciate hearing them.

Thanks,
Shawn

Attachments:
timing.jpg
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Author:  Shawn Odekirk [ Thu Jul 30, 2020 7:18 pm ]
Post subject:  Re: Help Converting ABEL to CUPL
A coworker thinks that the flip-flop is only reset once at power-up, so we are hopeful that the original design using a registered output will work.
Thanks again to everyone who took the time to read these posts.

Shawn
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