6502.org
http://forum.6502.org/

Making WinCUPL files easier to read
http://forum.6502.org/viewtopic.php?f=10&t=6074		 Page 1 of 1
Author:  Martin A [ Sun Apr 05, 2020 11:40 am ]
Post subject:  Making WinCUPL files easier to read
Elsewhere on the forum there's a note about the lack of CUPL tutorials, so I though start things off I'd mention some code I've been using that makes CUPL files easier to read, and reduce the chances of typos.

It's quite common to see CUPL files that rely on testing individual address bits to do chip selection and the like. With equations like:
Code:
!ramcs = !A15 ;

!io = !A13 & !A14 & A15 ;

!romcs = A13 & A14 & A15 ;

It's not exactly clear from the equations what the memory map is

WinCUPL has the "FIELD" definition to make thing easier to read (and reduce typo issues).

With just pins A13 to A15 defined you can still use:
Code:
FIELD address = [A15..A0] ;

!ramcs = address:[0000..7FFF] ;

!io= = address:[8000..AFFF] ;

!romcs = address:[E000..FFFF] ;

The compiler will let you know if the address range can't be achieved with the declared pins.

The GAL code below was for a test board that had 32k ram, 16k rom, a ZXspectrum style 6k+ 3/4k attributes screen map and 4 I/O decodes. The field definition almost makes the memory map at the bottom redundant.

Code:
Name     6502test ;
PartNo   00 ;
Date     09/02/2018 ;
Revision 01 ;
Designer Engineer ;
Company  None ;
Assembly None ;
Location  ;
Device   p22v10 ;

/* *************** INPUT PINS *********************/
PIN   1  = A12                      ; /* 6502 address lines              */
PIN   2  = A13                      ; /* Order skewed to match wiring    */
PIN   3  = A14                      ; /*                                 */
PIN   4  = A15                      ; /*                                 */
PIN   5  = A11                      ; /*                                 */
PIN   6  = A10                      ; /*                                 */
PIN   7  = A9                       ; /*                                 */
PIN   8  = rw                       ; /* VGA board accesses memory       */
PIN   9  = phi2                     ; /* on phi low                      */
pin   10 = A8                       ; /*                                 */
pin   11 = A7                       ; /*                                 */
pin   13 = A6                       ; /*                                 */


/* *************** OUTPUT PINS *********************/
PIN  14   = wr                      ; /* qualified read and write        */
PIN  15   = rd                      ; /* to avoid contention with VGA    */
PIN  16   = colour                  ; /* video memory split over         */
PIN  17   = screen                  ; /* 2 devices                       */
PIN  18   = io6                     ; /* 4 I/O blocks                    */
PIN  19   = io4                     ; /*                                 */
PIN  20   = io2                     ; /*                                 */
PIN  21   = io0                     ; /*                                 */
PIN  22   = ramcs                   ; /* main memory chip selects        */
PIN  23   = romcs                   ; /*                                 */


Field address = [A15..0];

/* 32k main memory */
!ramcs =
  address:[0000..7FFF]
;

/* The VGA CPLD expects the first 6k of the 8k space allocated for the bitmap    */
!screen =
address:[8000..97FF]
;

/* The VGA CPLD expects the next 768 bytes to be allocated for the colour memory */
!colour =
address:[9800..9AFF]
;

/* I/O allocated in the otherwise un-used 1.25k in the 8000 to 9FFF block                           */
/* since there is room to decode additional addres lines on the GAL the I/O areas are only 64 bytes */
/* making 9C00 to 9FFF available for additional hardware which will need decoding by the expansion  */

!io0 =
address:[9B00..9B3F]
;

!io2 =
address:[9B40..9B7F]
;

!io4 =
address:[9B80..9BBF]
;

!io6 =
address:[9BC0..9BFF]
;

/* 24k ROM available to fill the remainder of the map - currently set for 16k only */
/*  !romcs = address:[A000..FFFF] ; */

!romcs =
address:[C000..FFFF]
;

/* databus only valid while PHI is high so read and write are both qualified */

!rd =  rw & phi2  ;   

!wr = !rw & phi2  ;

/* Memory map                         */
/* 0000 - 7FFF 32k     RAM            */
/* 8000 - 97FF 6k      Screen bitmap  */
/* 9800 - 9AFF 0.75k   Screen colours */
/* 9B00 - 9B3F 64 Byte I/O block 0    */
/* 9B40 - 9B7F 64 Byte I/O block 1    */
/* 9B80 - 9BBF 64 Byte I/O block 2    */
/* 9BC0 - 9BFF 64 Byte I/O block 3    */
/* 9C00 - 9FFF 1k      expansion I/O  */
/* A000 - FFFF 24k     ROM            */
Author:  floobydust [ Sun Apr 05, 2020 6:10 pm ]
Post subject:  Re: Making WinCUPL files easier to read
I think many of us (myself included) have had some issues using WinCUPL. I still do... now that I'm working with an ATF16V8 for another project :roll: . However, I used an ATF22V10CQZ on my last SBC. Peter (cbscpe here) showed simplified WinCUPL detail for the Glue logic I was working on (using the FIELD statement). It obviously made more sense for defining address ranges for the RAM, ROM and I/O addresses. I also used the single glue chip to generate phase 2 clock validated memory read/write signals.

Here's what my glue chip ended up looking like:

Code:
Name     Glue3 ;
PartNo   01 ;
Date     10/31/2017 ;
Revision 01 ;
Designer KM ;
Company  Analogue Technologies ;
Assembly SBC2 ;
Location  ;
Device   g22v10 ;

/* *************** INPUT PINS *********************/
PIN 1    = CLK                       ; /*                                 */
PIN 2    = A15                       ; /*                                 */
PIN 3    = A14                       ; /*                                 */
PIN 4    = A13                       ; /*                                 */
PIN 5    = A12                       ; /*                                 */
PIN 6    = A11                       ; /*                                 */
PIN 7    = A10                       ; /*                                 */
PIN 8    = A9                        ; /*                                 */
PIN 9    = A8                        ; /*                                 */
PIN 10   = A7                        ; /*                                 */
PIN 11   = A6                        ; /*                                 */
PIN 13   = A5                        ; /*                                 */
PIN 23   = RW                        ; /*                                 */

/* *************** OUTPUT PINS *********************/
PIN 14   = !IO1                      ; /*                                 */
PIN 15   = !IO2                      ; /*                                 */
PIN 16   = !IO3                      ; /*                                 */
PIN 17   = !IO4                      ; /*                                 */
PIN 18   = !IO5                      ; /*                                 */
PIN 19   = !ROM                      ; /*                                 */
PIN 20   = !RAM                      ; /*                                 */
PIN 21   = !MWR                      ; /*                                 */
PIN 22   = !MRD                      ; /*                                 */

/** Declarations and Intermediate Variable Definitions  **/
FIELD ADDRESS = [A15..0];

RAM = ADDRESS:['h'0000..7FFF];
IO1 = ADDRESS:['h'FE00..FE1F];
IO2 = ADDRESS:['h'FE20..FE3F];
IO3 = ADDRESS:['h'FE40..FE5F];
IO4 = ADDRESS:['h'FE60..FE7F];
IO5 = ADDRESS:['h'FE80..FE9F];
ROM = ADDRESS:['h'8000..FDFF]
        # ADDRESS:['h'FEA0..FFFF];
/** Logic Equations **/
MWR = (CLK & !RW);
MRD = (CLK & RW);


Perhaps the above will also be useful for getting WinCUPL working. I've also found minor changes end up generating errors in WinCUPL. Just quitting WinCUPL, restarting it and loading the same file then will work... who knew.
Author:  cbscpe [ Sun Apr 12, 2020 7:12 pm ]
Post subject:  Re: Making WinCUPL files easier to read
Always terminate files with a carriage return (empty line at the end) and when WinCUPL just says "syntax error" with no further information it will leave some information in cache and therefore you have to restart WinCUPL. There are even more oddities when using ATF1508 CPLDs. Whoever wrote WinCUPL was very bad at writing lexical scan routines. Also I advice that you always prefix numbers with the base and always use positive logic. The following
Code:
PIN  22   = ramcs                   ; /* main memory chip selects        */
.
!ramcs = address:[0000..7FFF] ;

should be written as
Code:
PIN  22   = !ramcs                   ; /* main memory chip selects        */
.
ramcs = address:['h'0000..7FFF] ;

You were lucky because you started with hex numbers and use only hex numbers, but when you have a design file that mixes the base, e.g. octal, binary, decimal, hex, WinCUPL remembers the last setting of base and will reapply it to the next number. This might be correct as in your case, but it might be wrong or even throw a syntax error.
Author:  nospam2000 [ Fri Jul 03, 2020 9:12 am ]
Post subject:  Re: Making WinCUPL files easier to read
floobydust wrote:
Code:
PIN 2    = A15                       ; /*                                 */
PIN 3    = A14                       ; /*                                 */
PIN 4    = A13                       ; /*                                 */
PIN 5    = A12                       ; /*                                 */
PIN 6    = A11                       ; /*                                 */
PIN 7    = A10                       ; /*                                 */
PIN 8    = A9                        ; /*                                 */
PIN 9    = A8                        ; /*                                 */
PIN 10   = A7                        ; /*                                 */
PIN 11   = A6                        ; /*                                 */
PIN 13   = A5                        ; /*                                 */


An easier way to write this:
Code:
PIN     [2..11,13] = [A15..A5];

Michael
Author:  fredericsegard [ Mon Dec 28, 2020 5:26 pm ]
Post subject:  Re: Making WinCUPL files easier to read
Just thought I'd share my WinCUPL file. I'm glad I discovered the FIELD argument, otherwise, it would have been a big mess to make debuggable glue logic. Please feel free to comment on it, so I may improve it. But as is, my SBC works fine.

Code:
Name       Mainboard Logic Decode ;
PartNo     ATF22V10C ;
Date       2020-12-13 ;
Revision   04 ;
Designer   Frederic Segard ;
Company    The Micro Hobbyist ;
Assembly   6502 mainboard logic ;
Location   U5 ;
Device     G22V10;

/* *************** INPUT PINS *********************/
PIN 1   =  CLK;   /* Clock */
PIN 2   =  A15;
PIN 3   =  A14;
PIN 4   =  A13;
PIN 5   =  A12;
PIN 6   =  A11;
PIN 7   =  A10;
PIN 8   =  A9;
PIN 9   =  A8;
PIN 10  =  A7;
PIN 11  =  A6;
PIN 13  =  RW;      /* Read Write */

FIELD ADDRESS = [A15..A6];

/* *************** OUTPUT PINS *********************/
PIN 23  =  !ROM;      /* ROM select */
PIN 22  =  !RAM;      /* RAM select */
PIN 21  =  !RTC;      /* Realtime Clock select */
PIN 20  =  !VIA1;      /* Parallel select */
PIN 19  =  !ACIA;      /* Serial select */
PIN 18  =  !VIA2;      /* Bank RAM latch */
PIN 17  =  !BANK_CS;   /* Bank RAM select */
PIN 16  =  !IO;      /* I/O */
PIN 15  =  IOCS;      /* I/O chip select */
PIN 14  =  !OE;      /* Output Enable, or !Read */

/* *************** EQUATIONS *********************/
RAM     =  ADDRESS:[0000..6FFF] & CLK;
RTC     =  ADDRESS:[7000..77FF] & CLK;
ACIA    =  ADDRESS:[7800..783F];
VIA1    =  ADDRESS:[7840..787F];
VIA2    =  ADDRESS:[7880..78BF];
IO1     =  ADDRESS:[78C0..78FF];
IOCS    =  ADDRESS:[7900..7FFF];
BANK_CS =  ADDRESS:[8000..8FFF] & CLK;
ROM     =  ADDRESS:[9000..FFFF] & CLK;
OE      =  RW;
Page 1 of 1 All times are UTC
Powered by phpBB® Forum Software © phpBB Group
http://www.phpbb.com/