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PostPosted: Tue Jul 13, 2021 4:40 pm 
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Hello everybody,

I have been pouring over this section of the forum lately trying to figure out if CPLD is right for me. I'm trying to simplify a heap of DIP logic for a 25MHz project, and it looks like the right direction to go.

However, I'm finding it difficult to get my bearings on how to start. I am more zeros than ones when it comes to hardware, so that probably doesn't help. Thus, if you have the time and patience, I would greatly appreciate some guidance on the following points.

1. EEPLD vs SPLD - I assume that the EE means this style of PLD can be re-programmed several times? Does this imply that a SPLD is a one-shot deal?

2. I am drawn to the ATF16V8C-7PU DIP part after hunting through Mouser's listings because it lists a max 7.5ns propagation delay. Does this imply that with no programming its base speed is 7.5ns, or is this the input-to-output speed I can expect after programming the chip? Does number of gates used increase this time beyond 7.5ns? If so, is there a good way to approximate the delay incurred based on the logic I want to program into it?

3. How would I physically write a program to an ATF16V8C chip? I have an XGecu TL866II Plus DIP-chip programmer already. According to a link I found on Reddit (http://www.autoelectric.cn/MiniPro/TL866II_List.txt) it seems to be a supported chip, but if anybody has any anecdotal evidence of it working/not working, I would feel more comfortable before buying a batch.

4. Does anybody know of any "goldmine" primers on the topic that were valuable when starting out?

My apologies if this information has been covered before - I have been paging through here and searching Google to no avail. Many thanks for any consideration anybody can spare toward these questions. I am very excited to get my project going again, and I am hoping that this is the way forward.


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PostPosted: Tue Jul 13, 2021 5:55 pm 
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Simple Programmable Logic Device (SPLD), Complex Programmable Logic Device (CPLD) and Electronically Erasable Programmable Logic Device (EEPLD), are all bacically the same thing.

Searching on Mouser:
in the DIP devices, the ATF16V8C is listed as an SPLD. Where as the ATF16V8B is listed as EEPLD. However for programming them in CUPL the device option is the same "g16v8a" for both.

Its the same the PLCC parts. The ATF1502 and AFT1504 are listed as CPLD but the ATF1508 from the same family is listed as EEPLD.

The original PAL (programmable array logic) from the late 70s early 80's was one shot, the modern devices are re-programmable. According to the datasheets, both the ATF16V8B and 16V8C are good for 100 program and erase cycles.


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PostPosted: Tue Jul 13, 2021 6:06 pm 
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For the timing question, I think simple logic equations will run at the given timing (or possibly a bit faster) - only complex expressions which need to chain more than one logic block will take longer.

Mostly, you won't need to care about the implementation details inside the chip - you just need to describe what you want and use a tool to convert that description to a programming file.

Every CPLD you buy today will be a CPLD, I think - you don't need to worry about types. Except, perhaps, you need to keep an eye on whether it runs at 5V, is 5V-tolerant, or 3V only.


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PostPosted: Tue Jul 13, 2021 9:03 pm 
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Martin A and BigEd, thank you both very much for your information. That clears up a lot for me :D If anybody else can verify success with programming via XGecu TL866II Plus, I'd love to hear, but from what I'm reading it should just work. I think I'll order a handful and circle back and verify this myself whether or not it gets a response.


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PostPosted: Wed Jul 14, 2021 7:10 am 
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iamgrazzi wrote:
1. EEPLD vs SPLD - I assume that the EE means this style of PLD can be re-programmed several times? Does this imply that a SPLD is a one-shot deal?

EEPLD is basically describing a technology, not a specific kind of device. It means "electrically-erasable programmable logic device," a term which encompasses SPLDs (simple programmable logic device) and CPLDs (complex programmable logic device), but not FPGAs.

The fundamental differences between an SPLD (aka GAL) and a CPLD lie in the available logic resources, commonly quantified in the number of macrocells in the device, and the absence or availability of "buried logic," which refers to logic elements that can be programmed as intermediate stages in a logic train without having to be connected to any pins. Any given CPLD will have much more logic resources than an SPLD, will support buried logic, and will have a commensurately larger number of pins.

Whether SPLD or CPLD, the methods used to program then are essentially the same. Software such as Microchip's WinCUPL handles much of the low-level complexity of erasing, programming and verifying a device, using source code that you have created. A simulator is included so you can see how your logic works...or doesn't. :D

Quote:
2. I am drawn to the ATF16V8C-7PU DIP part after hunting through Mouser's listings because it lists a max 7.5ns propagation delay. Does this imply that with no programming its base speed is 7.5ns, or is this the input-to-output speed I can expect after programming the chip? Does number of gates used increase this time beyond 7.5ns? If so, is there a good way to approximate the delay incurred based on the logic I want to program into it?

The quoted prop delay for PLDs of any kind is "pin-to-pin." In other words, if it is a 7.5ns device and an input is applied to any given pin, an output pin driven by logic that is dependent on the state of that input pin will reflect a change of input state in 7.5ns. That is generally a guaranteed number under specified operating conditions and isn't usually affected by the logic complexity, subject to the following caveat.

As GALs don't have buried logic, there will be situations in which an output pin must be used as a node to "wire" two logic elements together, e.g., a series of two flip-flops that are "connected" to generate a wait-state. In such a case, the prop delay from the original input to the final output will be 15ns, since more than two pins are involved, and it is computed as pin-to-pin.

In contrast, a CPLD can use buried logic to do things that would require use of pins as nodes with an SPLD. Hence the CPLD will generally handle the same logic faster than an SPLD if buried logic, e.g., latches and flops, is used.

Quote:
3. How would I physically write a program to an ATF16V8C chip? I have an XGecu TL866II Plus DIP-chip programmer already. According to a link I found on Reddit (http://www.autoelectric.cn/MiniPro/TL866II_List.txt) it seems to be a supported chip, but if anybody has any anecdotal evidence of it working/not working, I would feel more comfortable before buying a batch.

The ATF series (formerly Atmel, now Microchip) uses a wonky programming algorithm that is not supported by all devices that can program the 16V8 series of GALs. The only way to positively determine if your unit will program one of Microchip's devices is to write some simple combinatorial logic, burn the resulting JEDEC file into a GAL, and then breadboard the GAL so you can exercise its inputs and see what comes out of the outputs. You can do that using nothing more than a standard logic probe and a suitable power source.

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Last edited by BigDumbDinosaur on Thu Jul 15, 2021 5:36 pm, edited 1 time in total.

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PostPosted: Thu Jul 15, 2021 3:46 pm 
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Oh wow! Thank you kindly, BigDumbDinosaur. I appreciate you taking the time to provide such a comprehensive reply!

I will have to pick up a few CPLDs along with my proposed SPLD order then as well. I am hoping to recreate the 74HC166 parallel to serial shift register - a part I find very clever, but fear it will be too slow (if ideal conditions are violated, which I'm sure they will be :)) to keep up with the 25MHz I need it to shift out at. Sounds like a CPLD would be the way to go here to recreate that complexity at a faster pace, while keeping my decode logic as SPLDs should do just fine.

I think I will bite the bullet and just order a handful of ATF16V8Cs and report back about how programming goes. Either way, I do believe PLDs are the way of the future for me (after struggling with massive 74-series logic projects for years, I think I can finally move on!) so if it doesn't work with my current programmer, I can always get a proper one down the line.

Thank you again! So excited to hit the ground running with this "new" (to me) technology.


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PostPosted: Thu Jul 15, 2021 8:01 pm 
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Programming will be OK for the ATF16V8C, I have a XGecu TL866II Plus too and already programmed many ATF16V8C, ATF16V8B, ATF22V10C, etc… It’s really straightforward, I would love the wincupl part of programming to be as simple…


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PostPosted: Sat Jul 17, 2021 2:16 am 
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ojanhk wrote:
Programming will be OK for the ATF16V8C, I have a XGecu TL866II Plus too and already programmed many ATF16V8C, ATF16V8B, ATF22V10C, etc… It’s really straightforward, I would love the wincupl part of programming to be as simple…


Ojanhk, this is wonderful news! Thank you for sharing. Now for the "fun" part, as I'm guessing you'd put it - time to learn Wincupl :)


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PostPosted: Sat Jul 17, 2021 5:14 pm 
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I too have programmed the small ATF16V8 and ATF22V10 devices on a TL866 II Plus - but it's a recent addition to the open source command line minipro software, it only went in about a year ago I think. I'm not sure if the official GUI-based programming software supports these devices.

It might also not work on really old TL866s. There have been several revisions. Mine is the "II Plus" version as I said above.

For authoring I use WinCupl, but not the GUI as it is really unstable and limiting. I edit the code in a text editor, and I wrote some command line scripts that I run from make to compile the "code", run the simulator (to test the result), and report errors as clearly as I could. The underlying software is pretty sketchy still but for me this made it tolerable! The result is a .jed file that you can program into the chip with minipro.


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PostPosted: Tue Jul 20, 2021 5:40 pm 
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Hey gfoot - think I recognize you from Reddit.

Thanks for the extra confirmation - my acquisition of minipro and the TL866 II Plus are both pretty recent additions (within the last 6 months) so hopefully I am within spec there, but I'll check for any updates to minipro.

Great tip on the workflow too! I think that's how I'll try to go at it as well, that way I can write my code on my Mac then copy it over - and spend as little time as possible on the Windows side of things. I'm not hearing a lot of good things about WinCupl, but then again I'm not surprised that such a software isn't focused on the average user experience :lol:


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PostPosted: Tue Jul 20, 2021 7:11 pm 
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Yes, I didn't notice your name earlier!

I think I was wrong about when the support went in actually - there were some new variants added last year but others had existed there for a while.

I've wondered whether it could be possible to run the WinCupl command line tools through an emulator, or through Wine. By the time you've gotten rid of the GUI it might emulate pretty well in a foreign environment.


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