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ElEctric_EyE
PostPosted: Sun Mar 15, 2020 3:43 pm 
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Joined: Mon Mar 02, 2009 7:27 pm
Posts: 3258
Location: NC, USA
Small progress report:
Finally got the desktop fixed, the Intel CPU I7 6850 went bad. I was able to find a new I7 6800 and got everything installed.
Got the old server backed up to the AS3204T NAS.
Found an old PVB project(s) that worked on the PVB board!
Installed the VGA to HDMI connector and got the PVB board to output video to the Samsung 43" HDMI TV!

I think the next step is to get the old PVB ISE project files adapted to this new AV board for a solid foundation. Going back 7 years for this PVB project, but the good thing is the FPGA, SyncRAM and videoDAC are the common elements between the old and new boards. Here's a pic side by side. ;)

EDIT: It's an older pic, before I gave the AV board an ultrasonic bath in isopropyl.


Attachments:
AV&PVB.jpg
AV&PVB.jpg [ 1.16 MiB | Viewed 885 times ]

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ElEctric_EyE
PostPosted: Mon Mar 16, 2020 8:09 pm 
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I have found a MAJOR flaw in my PCB design!! It is quite embarrassing but I will share...

I first encountered the situation when designing the first 1080AV PCB after 6+ years, there was a question mark in my head when I was doing vias that had to connect to the inner planes. I carelessly disregarded and proceeded forward. Long story short, the vias I made for VCCINT & VCCAUX of the FPGA's were only connected to the opposite side of the board and bypassed the internal 3.3V and GND layers. This explains alot as I was beginning to suspect that it was something MAJOR when I recently started to dig deeper and deeper into troubleshooting, especially now that I had an old functioning PVB to compare signals with on the 'scope and also compare PCB layouts...

I really would like to start a new thread and discard this one. I will ask Garth. Either way, it shouldn't take long to fix and add to the Version 1.7 board production. I'm going to try to save the main IC's on top of the board against my better judgement.

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BigEd
PostPosted: Mon Mar 16, 2020 8:39 pm 
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Location: England
Aaargh. Sorry to hear about such a big mistake!
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ElEctric_EyE
PostPosted: Sun Mar 22, 2020 5:58 pm 
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ElEctric_EyE wrote:
I have found a MAJOR flaw in my PCB design!!....

Sorry this was not this case. I think I was staring at the monitor too long and my thought process got buggered. I apologize.
Progress report: So I've got the PVB to output to the Samsung 7 43" HDMI smartTV using the VGA to HDMI adapter and video settings from here. And the TV/monitor does recognize the timings. It did not recognize or even display anything with my timings (which are to the right of the semicolon). It used to work on an analog monitor with a VGA connector.
Code:
LDA #1920               ;2430 (2200 ideal for 67.5kHz) total H cycles      @148.5MHz 16.363uS ->  61.111kHz         
                  STA hVIDEO                                                                       
                  LDA #88                 ;205                                                     
                  STA hFRONT                                                                       
                  LDA #44                  ;50                                                   
                  STA hSYNC                                                                       
                  LDA #148                 ;255                                                     
                  STA hBACK
                 
                  LDA #1080                ;1139 total     @148.5MHz ->  1139 x 16.363uS = 18.638mS = 53.654Hz
                  STA vVIDEO                                                                               
                  LDA #4                   ;2                                                             
                  STA vFRONT                                                                               
                  LDA #5                  ;55                                                           
                  STA vSYNC                                                                                 
                  LDA #36                   ;2                                                             
                  STA vBACK


Attachments:
PVB.jpg
PVB.jpg [ 476.51 KiB | Viewed 788 times ]
1920x1080confirmed.jpg
1920x1080confirmed.jpg [ 446.51 KiB | Viewed 788 times ]

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ElEctric_EyE
PostPosted: Sun Mar 22, 2020 6:00 pm 
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Applying the same settings got the 1080AV board to display an all green screen, which was incorrect. However the monitor did recognize the timings from this board as well. Progress!

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ElEctric_EyE
PostPosted: Mon Mar 23, 2020 8:44 pm 
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Confidence is near 100% that the FPGA JTAG section is fully functional due to the fact I have the green screen display output and the monitor recognizes the hsync & vsync signals to display 1920x1080. The scope also verifies nice clean hsync & vsync signals @ the VGA connector. When modifying the video parameters in 65Org16 software, the monitor jives with what I had programmed...

Going forward with a new V1.7 board layout and brand new IC's. Checking Digikey and Express PCB, COVID-19 is not affecting them. So an order is being put in by the end of the week for fresh Spartan 6's and a new board layout. 2 fresh 4Mx18 SyncRAMs are still in my stock...

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ElEctric_EyE
PostPosted: Mon Mar 30, 2020 8:32 pm 
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New boards ordered today! The last boards I ordered were silver plated, RoHS lead free which increases the level of difficulty for soldering. I wasn't aware of this... This time I ordered like I usually do with the lead/tin surface plating.
It will probably be next week before the boards arrive.
As an experiment I've put a 1mm 9pin BGA footprint on this board layout in order to see if the solder mask is properly covering the vias. I've been experimenting with Express PCB software and it is currently a PITA for BGA but we'll see if it's now doable with their new software. I'm going to make a request to them to incorporate this option when placing vias. One shouldn't have to go through what I did in this day and age for a tented via. Just right click on the via and choose 'tented'. BAM! done.

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