BigDumbDinosaur wrote:
That said, your memory map is unwieldy. It appears you are trying to maximize the amount of ROM visible to the MPU, which isn't going to work the way it would seem.
I have a 32K RAM chip, a 32K ROM chip. My memory map tries to make as much of each of them available as possible.
The microprocessor trainer board I built in college used a PLA for address decoding, so using a GAL seems natural. While it may be overkill and a waste to decode all the way down to A4, I like that I have almost no wasted addresses. If I was really OCD the unused addresses from $8014 - $801F would really bother me. As it is, they only slightly annoy me.
BigDumbDinosaur wrote:
The chip select may be at $8020, but as you will soon discover, unless ROM falls on a even block boundary, i.e., $8000, $A000, $C000, etc., you won't be able to access all of it. For example, in my POC V1.2 unit, I have a 32KB ROM mapped in at $00D000-$00FFFF (this is an '816, but the principle is the same). The first 1KB of the ROM is not accessible because it falls in the range $00C000-$00CFFF, an address range in which I/O hardware appears. This is an artifact of the way in which the ROM's address lines have to wired into the system. So when I burn a ROM I have to start at $1000 in it so code appears at $00D000. The most ROM I can access is 12KB, which is plenty.
I don't understand. Except for the trouble I am having with A6 and pin 13 (which I wouldn't have found except for your comment, which prompted me to check, thank you!), I am able to access all of the ROM from $8020 through $FFFF. Maybe I am misunderstanding what you are saying.
A future revision may have a completely different memory map, but for now, with the chips that I currently have, I am happy with my memory map.
I really appreciate everyone who takes the time to comment. I have a lot of respect for everyone here, and your comments really help.