cbmeeks wrote:
So my question is, how large of a CPLD have you guys actually used in your projects? Was it overkill or did you wish you had more I/O? More speed? etc.
I've also used an XC95108 in my micro. I/O was sufficient, and I expect unless you are looking to implement a full bus master, it would be enough pins for most 8 bit micros. I don't have the results from the build report, but I'm pretty sure these parts would be good to at least 20MHz.
I used it for Address decoding, Read/Write generation, Simple Interrupt controller, Tone generator, Bank switching, and an 8 bit latch for the high byte on the IDE port. There were about 10 pins left over after the core usage was allocated (I routed only the high byte of the address bus, plus A0). The 10 extra pins were used for the expansion connector, and eventually were used for more chip selects and interrupt inputs etc.
My eventually goal was to try implementing a simple DMA controller, and at that point I ran into the logic limitations of what I could do with a CPLD. Hence my next (current) board uses a pair of Altera Flex 10K FPGAs (specifically the EPF10K10). These are what I believe to be the most accessible FPGAs for incorporating in our 5V micros. They are available in PLCC84 and have at least 5 times the logic of something like the XC95108. Because they are runtime programmed via an external config flash, they are more work to integrate. It might seem a bit weird using an FPGA in a micro filled with retro-parts, but there.