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 Post subject: WinCUPL and ATF1504AS
PostPosted: Sat Jan 13, 2018 8:26 pm 
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Location: A missile silo somewhere under southern England
Hi guys

I'm trying to design my latest 65C02 designs glue logic in WinCUPL. It's destined to end up in an Atmel ATF1504AS CPLD.
At this point I have to admit to being a bit rusty with WinCUPL as I've only just got into 65C02 project design (and electronics itself) after a long period doing other things.

Now, the issue I'm running into is simply the header. Is the follow correct for the above device?

Code:
Name      Test;
Partno    Test;
Date      12/1/2018;
Rev       01;
Designer  Test;
Company   Test;
Assembly  None;
Location  None;
Device    f1504plcc44;


I've tried compiling the following (as a test) and WinCUPL crashes and I can't see why. My old 65C02GBPD GAL code compiles just fine and I've tried changing the pin and the lavel it's being set to, chnaged the location of the project, copied it into notepad and back out (gets rid of hidden characters), unselected the Simulator - but it makes no different: I get a "PLD/FPGA Language Compiler has stopped working" crash. Argh.

Code:
Name      Test;
Partno    Test;
Date      12/1/2018;
Rev       01;
Designer  Test;
Company   Test;
Assembly  None;
Location  None;
Device    f1504plcc44;

pin 7 = test;


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PostPosted: Sat Jan 13, 2018 8:42 pm 
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I checked the user guide (http://ww1.microchip.com/downloads/en/D ... 0Guide.pdf) and it seems the device name that I used is the right one for the ATF1504AS (although I'll be swapping to the JTAG enabled version).
I also got confirmation that WinCUPL doesn't like windows 10 much, so maybe that's the issue. I really wish Atmel / Microchip would modernise it given that it's now so old, but used by many people to program their devices.


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PostPosted: Sat Jan 13, 2018 9:19 pm 
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Joined: Sat Jan 02, 2016 10:22 am
Posts: 197
Same crash experienced here, running on windows 10, if there's no logic equations.

The with the addition of the final line, the following file does compile. The cuplc module appears to be the one faulting.

Code:
Name     Test ;
PartNo   00 ;
Date     30/12/2016 ;
Revision 01 ;
Designer Engineer ;
Company  None ;
Assembly None ;
Location  ;
Device   f1504ispplcc44 ;
/* commited pins on 1504 - with ISP enabled  */
/* Power pins 3, 15, 23 & 35                 */
/* ground pins 10, 22, 30 & 42               */
/* JTAG pins 7 TDI, 13 tms, 32 tck, 38 tdo   */
/* Input only 1 clr, 2 clk/oe, 43 clk, 44 OE */

/* *************** INPUT PINS *********************/
PIN    1  = reset                        ; /*                                 */
PIN    43 = clk                          ; /*                                 */

PIN 4 = test ;

test = !reset & !clk ;



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PostPosted: Sun Jan 14, 2018 12:20 am 
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Hi Martin

Thanks for confirming the issue and that it works when equations are used :). WinCUPL makes me want to scream sometimes :/


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PostPosted: Sun Jan 14, 2018 5:09 am 
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banedon wrote:
Code:
Name      Test;
Partno    Test;
Date      12/1/2018;
Rev       01;
Designer  Test;
Company   Test;
Assembly  None;
Location  None;
Device    f1504plcc44;

I recommend you use f1504ispplcc44 as the device so the fitter knows to not assign the JTAG pins to anything.

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PostPosted: Sun Jan 14, 2018 8:26 am 
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BigDumbDinosaur wrote:
banedon wrote:
Code:
Name      Test;
Partno    Test;
Date      12/1/2018;
Rev       01;
Designer  Test;
Company   Test;
Assembly  None;
Location  None;
Device    f1504plcc44;

I recommend you use f1504ispplcc44 as the device so the fitter knows to not assign the JTAG pins to anything.

Indeed. I was using the above device at first as guesstimate, but then looked it up. Works for testing this issue though. I'm now using the JTAG enabled version :).


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