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PostPosted: Fri Sep 01, 2017 10:21 pm 
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I have my ATF1504AS setup in a PLC-44 to DIP44 adapter. I have it powered with 5V on my breadboard (all VCC/GND) with good decoupling caps (that I can tell).

I've connected the ATDH1150USB-K cable up....connected ribbon cable to JTAG-A.

Next, I connected wires from GND and the four JTAG pins.

To the best of my knowledge, the following is connected:

Code:
JTAG GND 2 to board GND
JTAG TCK 1 to CPLD TCK 32
JTAG TDO 3 to CPLD TDO 38
JTAG TMS 5 to CPLD TMS 13
JTAG TDI 9 to CPLD TDI 7


Using ATMISP, I confirmed the USB cable/adapter is successfully detected. But it doesn't seem to detect the CPLD.

Code:
Setting up USB connection...OK
Scanning for USB cable connection
Setting up USB connection...OK
Calibration constant set to 1
total number of device(s) set in software: 1
total real number device(s) found in hardware: 0
causes can be: devices in reverse order, wrong cable selected, or off power


Now I followed the instructions that came with the cable (to create the "chain"?). Then I chose the "atf1504.jed" file out of the ATF1504AS folder and clicked RUN.

Not sure what that was about. But that's when I get the error.

At this point, I literally just want to blink an LED. Any idea on what I need to do to get to that point? Other than 6 weeks of studying...lol

Thanks for any tips.

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PostPosted: Sat Sep 02, 2017 4:33 am 
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I'll be the first to admit that I know very little about JTAG interfacing, but... I sortof expect that you'd want to connect TDO to TDI and vice versa, on the theory that the output of one device should connect to the input of the next.


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PostPosted: Sat Sep 02, 2017 8:26 am 
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Yes, under normal circumstances you want to connect TDO->TDI and TDI->TDO between devices, making a serial chain.
However, I have seen JTAG debuggers that label their pins the other way meaning "this pin should connect to the Test Data Output" rather than "this pin is the Test Data Output".
Best to check the manual if you have one.

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PostPosted: Sat Sep 02, 2017 9:56 am 
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I've used the 84 pin version of the ATF1504AS in a project (replacing the original MAX7000).

The JTAG header is straight wired - TDO->TDO etc. The circuit diagram can be found here, apologies in advance though, the board it self is Z80 (sorry!)
http://primrosebank.net/computers/mtx/projects/mtxplus/cpu/mtxplus_cpu.htm

The board is connected to the JTAG-A output on the programmer:
Attachment:
File comment: Hardware connection, JTAG-A to straight wired header
JTAG connected.jpg
JTAG connected.jpg [ 73.62 KiB | Viewed 3783 times ]


Once the board is back in the system, and the power connected, the ATMISP screen setup looks like this:
Attachment:
File comment: ATMISP ready to program
ATMISP view.jpg
ATMISP view.jpg [ 119.72 KiB | Viewed 3783 times ]


edit: A thought have you connected the 5v on the programming header ?


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PostPosted: Sat Sep 02, 2017 2:47 pm 
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Location: Soddy-Daisy, TN USA
Martin A wrote:
A thought have you connected the 5v on the programming header ?


I'm an idiot. That was it!! I forgot the VCC.

Now it works.

As a note, I didn't swap TDO/TDI. I left them the same and it works. Oh well...lots to learn!

Thanks everyone.

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PostPosted: Fri Oct 13, 2017 7:30 am 
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Hi all!

Sorry for my bad english and some off-top, but i have same problem with ATF1508AS PLDs.

There is a board with sequentionally chained 3 PLDs (that was previously programmed by producers of PCB) (TDO of 1st -> TDI of 2nd etc.) and ST(M)PSD813F1A connected to 1st PLD. TDI of JTAG port on board connected to TDI of PSD813 and TDO of JTAG port on board connected to TDO of 3rd PLD. When we try read the PLDs via ATMISP 6.7/7.2 and ATDH1150USB-K programmer, it`s generates an error message - "Number of devices in chain file does not match number of devices in software" (in software we set 4 - 1 unknown and 3 PLDs, but it`s sees 0 devices in hardware chain).

Its seems like the ATMISP software is not able to properly communicate with the JTAG devices, and one possibility is that the JTAG port of the ATF1508AS had been disabled by previously programming it with a JEDEC file that disable the JTAG port feature. How can we unlock PLDs and enable the JTAG port feature again?


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