- THE 65M02 PROJECT -

Hardware 24 bit binary to bcd converter
Hardware multiply
Hardware divide

Option for 32-bit floating point instructions

Plans are to produce at least three version,
one with full features and the other two
someway reduced

Considered peripherals:

- 1x USB
- 4x SPI
- 4x PIO
- 4x UART
- 8x PWM outputs
- 1x 12-bit ADC with 8 analog input
- 1x SD memory interface
- 1x Real-Time Clock/Calendar
- 4x Timers
- 1x bluetooth
- 1x wi-fi
- MIDI interface
- Arduino compatible connectors


Option for 3.5" 480x320 18-bit IPS LCD
Option for 3.0" 400x240 18-bit IPS LCD
Option for 2.8" 320x240 18-bit IPS LCD
Option for 2.4" 320x240 18-bit IPS LCD




This diagram shows the speed ratio relative to the 65C02 clocked at 1MHz

This implementation outperform the commercial 65C02 running at the maximum clock frequency of 14MHz

The lower ratio is 60x, for the following instructions the ratio is 150x:

STA abs,X (9Dh)
STA abs,Y (99h)
STZ abs,X (9Eh)

More details on request

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Sounds interesting - a little board, manufactured? With 5V supply? Perhaps with 5V-tolerant I/O, or maybe not?
Welcome!

The FPGA has input and outputs at 3.3V.

A low drop linear voltage regulator can also be added, allowing the board to be powered at 5V.

SN74LV4T125 with 5V voltage supply can provide the up translation for outputs at 5V.

SN74LV4T125 with 3.3V voltage supply can provide the down translation for inputs at 5V.

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