Hi i try to rebuild the Pet 2001 in FPGA

using this Project http://www.skibo.net/projects/pet2001fpga/ but have to change some Things(using other FPGA)
but i never show a Screen like this



Have someone an Idea what can be fault (Rom/Ram?). And why is my Screen so dark (in White Mode also, nothing is changed on orginal Sourcecode exept the Green Screen Mode)I am a Newbe in FPGA programming.


Edit: A simple tryout brings a Picture but still to dark and still no Keyboard ( Char Before the cursor?) and the Ram (normal 7167 Bytes Free)

I had a look at that project a week ago or so; in my case I looked into the version for the Arty FPGA board. I couldn't get the latest code from the Github repo to work but that's because he didn't update all the files. I'll probably fix it in my fork and then send a pull request. When I have time. Anyway, that's not your problem I'm sure, because you're working with an Altera board.

If your video is too dark, you probably did something wrong with the video bits. There are two bits (one for video, one for sync. Maybe the version for your board generates 3 bits: 1 for video, 1 for HSYNC and 1 for VSYNC; that's what you want for VGA anyway, right?). You should write your top level module such that the VGA D/A converters get the highest level of green (the D/A converters are probably 8 bits per color so green should probably be set to 8'xFF, but I'm not familiar with your board so Your Mileage May Vary) when the video bit is high, and zero when the video bit is low. Maybe you just connected the video bit to the top bit of the D/A converter instead of all the bits? That would only turn the video signal on to half brightness instead of maximum brightness.

As for the keyboard: It looks like you're using a USB keyboard with a PS/2 adapter? If so, are you sure your keyboard supports this? Many keyboards that were recently manufactured (in the last 10 years or so), don't support the PS/2 protocol anymore. Try connecting the keyboard with the PS/2 adapter to the PS/2 keyboard input of a PC (before you turn it on) and turn it on to see if it works. If not, use a different keyboard (or do some FPGA magic ). Also it looks like you're using a (green) Mouse converter plug, not a (purple) keyboard converter plug.

I can't explain why it's not showing all the memory and why you're getting the weird character as cursor instead of space/inverse space. Maybe you're trying to run it too fast and some signals don't make it to their destinations in time? Try lowering the top level clock frequency by inserting a PLL or a clock divider. The clock only has to be 1MHz to make it work like a real PET. Anything faster is a bonus.

And of course, see if you can reach Thomas Skibo; he may not be able to help you with Altera-specific issues (it appears he works with Xilinx FPGA's only) but he has more knowledge about the project than anyone

===Jac

USB/Ps2 Combo will work with other Cores this is not a Problem.

Have contacted Autor but no Answer, need help with the Rom Memory

Must seperate the CharRom, Screen shows only Garbage with 2-Port-Ram


Original Code



have try this



think problem is in Megafunctions must have address_a and address_b the same Size

My "working Solution"

My Verilog "fu" is not good enough yet to evaluate that, sorry...

But have you tried emulating the ROM without the megafunctions?

The construct that's used in the (SystemVerilog) HDL for the Virtual Propeller that I maintain (sort of) is similar to the following. It just sets up a big array of regs and uses the address to index the array. The Altera or Xilinx software figures out how to implement this as on-board RAM or some other way. It's not my code but this is portable between Xilinx and Altera and much more readable. See here for how ROM is implemented in the P1V project.

You would have something like:



===Jac

Sorry I haven't been responsive. It turns out the e-mail addresses on ALL my websites have not been forwarding properly. They just go into a black hole. I'm trying to get that fixed. Grrrr.


I updated the Pet2001_Arty repository to include the .v and .mem files that are missing. I run Vivado on Linux and use Makefiles to generate those files automatically. I added these files to the repository for those not running Linux.

--Thomas

Hi Thomas,

Thanks for the update! I'll check it out later this week.

If you don't mind me asking (and this may be a stupid question because I'm a noob with Vivado)... Why did you organize the project that way? As far as I can tell (but I just had a cursory look), the Makefile and Tcl scripts just copy everything to a different directory and then create a project file from scratch. I don't understand why that's necessary. In my P1V repository (which was an Altera project at first, but can now also be built with Vivado), I simply created a Vivado project P1V_arty.xpr, and added the source files, making sure that the "copy source files to project directory" option (or whatever it's called) was unchecked, so it keeps referencing the source files where they are. Then I added the project file to Github and updated my .gitignore to ignore the directories that Vivado creates automatically. Just wondering if that's the wrong way to go about it.

===Jac

It's a quirk of Vivado that if you use a "project.tcl" file (generated by Vivado), when it recreates the project, it creates the project and its subdirectories off to the side like that. I honestly can't remember why I went with a project.tcl file instead of just adding the project.xpr file to the repository. It might be because the .xpr file is specific to the version of Vivado you are running whereas the project.tcl file might work across different versions.

Ported to Mist FPGA Board , Keyboard and Rom/Ram is still Broken, Thomas can you help me With Rom/Ram? Send Link to Repo as Private Message

Problem solved


thanks for all Help