/* Input pins */
pin 2 = clk;
pin [4,5,6,8,9,10,11,15] = [D0..7];

/* Output pins */
pin [16,17,18,20,21,22,24,25,27] = [Q0..7];      /* Q output */

/* Logic */
[Q0..7].L = [D0..7]; /* Each Qi is a transparent latch with input Di */
[Q0..7].LE = clk; /* Each Qi is a transparent latch with enable connected to clk - follows input when clk low, latched when clk high */

Name      OctalDlatch;
Partno    C;
Date      17/07/2021;
Rev       01;
Designer  tst;
Company   shalewyn.com;
Assembly  None;
Location  None;
Device    f1508ispplcc84;


/*
I would start with:

Code:
pinnode = extram[0..7];

The PINNODE verb tells the compiler and fitter that the referenced elements are buried logic, not inputs or outputs.
I gave these elements the name extram to make it clearer what it is that is being processed-the MSB of an extended RAM address.
 Note that PINNODE is declared without a pin number, despite the name.

Once that statement has been made, you would write:

Code:
extram[0..7].LE = PHI1;
extram[0..7].L  = D[0..7];

The first statement opens the latches when PHI1 is high, which, of course, is when PHI2 is low. That statement also implicitly
declares extram to be transparent D-latches (the .LE and .L suffixes do that).

The second statement causes the latches to follow D0-D7 until PHI1 goes low, at which time the latches will be closed and retain
their content. Note that this is not qualified by PHI1 because D0-D7 become "don't cares" as soon as PHI1 goes false and the latches
close (which happens in a nanosecond or so after the fall of PHI1). There is no harm in doing so, but all you will accomplish is to
unnecessarily consume logic resources.

Your output statement would be:

Code:
A[16..23] = extram[0..7];

A16-A23 would be actual pins declared with a statement such as:

Code:
PIN = A[16..23];

You could add logic to the output statement to not drive A16-A23 unless VDA # VPA is true. However, as I mentioned elsewhere, VDA and VPA
are "don't cares" when it comes to latching A16-A23. Chip selects are what care about VDA and VPA, since you don't want to be accessing
 hardware while the MPU is busy outputting bogus addresses.

Along with the above, I would declare:

Code:
pinnode = bnk0;

followed later by:

Code:
bnk0 = extram[0..7]:['b'00000000];

The above will cause bnk0 to go true any time the MSB of the address is $00, that is, the address is in bank $00. You
can then use that as a term in your chip select logic to cause ROM and I/O to only appear in bank $00. Without that sort
of logic, ROM and I/O will mirror in all banks. The 'b' prefix means binary or bitwise. I could also write it as:

Code:
bnk0 = extram[0..7]:['h'00];

Use whatever is most understandable to you.

During your logic creation/edit/compile workflow, I suggest you not assign pin numbers to anything except the clock inputs
(GCLK1 for PHI1 and GCLK2 for PHI2 it what I use) and reset, if being used (connect that to GCLR). Let the fitter work out
the rest of the pins for you and concentrate on getting your logic correct. The fitter will distribute pin assignments as
needed to make the best usage of the CPLD's logic resources and avoid I/O combinations on any one macrocell that would exceed
the available PTs. If you insist on assigning all pins yourself then you will have to be prepared to study the CPLD's structure
in detail to determine how to distribute your logic and avoid running out of PTs with a particular macrocell.
*/



/*  Octal latch with D and clock inputs, D is passed to Q on  low, latch on clk high */

/* extram[0..7] is buried logic (pins). we'll be using these for the latch and feeding them with D0..7 inputs */

/* define inputs */
pin 2 = PHI1;
pin [4,5,6,8,9,10,11,15] = [D0..7];

/* define outputs */
pin = [A16..23];         /* A16..23 pin declaration. not defining the pins (i.e. PIN = A[16..23]) is useful for debug/testing */

/* define intermediates */
pinnode = [extram0..7];      /* declare 'extram[0..7] as being buried in logic, not as I/O pins */
pinnode = bnk0;         /* delcares bnk0 as being buried logic, not as I/O pin */

/* latch logic */
[extram0..7].LE = PHI1;      /* extram0..7 latch when PHI1 is high */
[extram0..7].L  = [D0..7];      /* extram0..7 latch inputs are set to D0..7 */
[A16..23] = [extram0..7];

/* bank0 handling */
bnk0 = [extram0..7]:['h'00];   /* make bnk0 true if extram0..7 becomes 0 */