Hi all,

I've been experimenting with a 6502 bus monitor recently. If you are interested, you can read more here:
viewtopic.php?f=4&t=3323
It supports address bus monitoring, single stepping, breakpoints (on instruction execution, read and writes), watches (which are non-intrusive) and as of yesterday a couple of external trigger inputs.

This is implemented a GODIL which contains Xilinx XC3S250E plus the necessary hardware to make it 5V compatible, all in a nice 40 pin DIL package, with jumpers to allow any power supply pin configuration.

I've been wondering about extending this to be a complete 6502 In Circuit Emulator, where it would replace the 6502 in the target system. It would need to be "hardware" compatible (according to the nomenclature in this thread.

Does anyone have any thoughts on which 6502 core I should start with?

Has anyone successfully used a GODIL to replace a 6502 in a real system?

regards

Dave

Hee hee - Peter Monta implemented the visual6502 transistor-level model in a Godil and successfully ran it in an Atari 2600!



That could be overkill, but I suspect you might want a cycle-accurate model, with all the stray reads and writes and interrupt timing behaviour. Do Jens Gutschmidt's "true cycle" models work well?
http://opencores.org/project,cpu6502_true_cycle
http://opencores.org/project,cpu65c02_true_cycle
Or, maybe, does the T65 perform precisely correctly at the cycle level? I'm not sure.

(Matt Godbolt found that you need a great level of precision to correctly run some of the devious software protection code on the Beeb, as you may know. But an accurate JavaScript model doesn't help your purpose.)

Hi Ed,

Thanks for those links.

The Visual6502 in a GODIL is very interesting.

I think I'll start with the T65 core, as this is what we use in AtomFPGA, and that has proved to be very compatible with all the Atom software we've tried so far.

My initial concern was more with the bus timings than with the instruction cycle level compatibility.

I think I'll just give it a try, and report back....

Dave

Quite pleased with this for a first attempt. This is using the GODIL with just the T65 core, and no attention paid to timings constraints:


For some reason AtoMMC doesn't work, so more investigation is required.

Maybe I'll try a different core, see if the results are consistent.

I could also include the bus monitor functionality, which would make debugging a bit more straightforward.

Dave

You do realise that was supposed to take three months?!

Hmmm, getting it to work with the AtoMMC hardware proved a bit harder.

The problem was the 6502 address bus was changing too quickly after the falling edge of Phi2, so the transparent latch on AtoMMC ended up latching the next bus address.

What I ended up having to do was to sample Phi0 with the GODIL's 49MHz clock, and then generate Phi1 and Phi2 with ~40ns of skew.

It seems 100% reliable now, and I'm able to load and run games etc.

I've also added the the bus monitor hardware (including the AVR8 soft core), and it fits nicely in the device.

Dave

Dave, I read about your progress at http://stardot.org.uk/forums/viewtopic.php?f=44&t=9655

It's incredibly amazing stuff! It's exciting to think of the possibilities. I wonder if you could update us here with the 6502 specific stuff?

I also have a request. I'm a big Commodore CBM-II fan. As you may or may not know the CBM-II line uses an MOS6509 cpu, which is based on the 6502 but adds 4 extra address lines allowing it to access up to 1 megabyte of RAM organized as 16 banks of 64K. There are two IO ports at $00 and $01 that control everything. There is a topic here about building a replacement 6509 with a 6502 and some logic:

viewtopic.php?t=2023

I wonder if you might be able to modify your 6502 code to make a 6509 replacement? It would be awesome!

Your work gives me hope that one day many of the really hard to find commodore MOS chips will be recreated in FPGA, such as the 6509, 6510T, 6530, 6532, C128 VDC, and TED etc. I'd also like to see simple VIC and VIC-II replacements with VGA outputs (projects like the C1, DTV, and Turbo Chameleon started out simple but morphed into complete replacements rather than focusing on individual chips).

Steve