Hi everybody,

I haven't posted in a while, but I did decide to implement a 65C02 softcore (Jens Gutschmidt's cpu6502_tc) in an FPGA, along with VGA output in order to, in the longterm, have some fun with IDE hard drives.

For the moment, I have got the CPU and monochrome VGA output working, and will be working on getting the firmware (ROM) to be upgradeable via UART (as resynthesizing the whole project does take a bit of time...), and have PS/2 input in order to run a monitoring ROM of sorts. I do plan on having color VGA eventually, but my FPGA board's standard VGA output is limited to 8 colors (although more can be made with certain techniques). The VGA module is fixed at 640x480, and is of my own work (for a school project about 2 years ago). The VHDL code hooking all the modules together is dirty though, especially for address decoding . There are latches I need to get rid of. The character ROM comes from M. Rictor , I took it from here, and subsequently adapted it for use with my VGA controller module.

The board I am using is the Xilinx Spartan 3E Microblaze Development board (no longer in production unfortunately... link).

The current system is running at 25 MHz, although the RAM/VRAM and ROM are synchronous, so I'm running them at 50 MHz in order to get data out before the 65C02's inputs latch.

The system memory MAP is as follows for the moment:

00 - 24 KiB : Main RAM
24 - 32 KiB : Video RAM (Write Only)
32 - 64 KiB : ROM (with IRQ/NMI/RST vectors hard coded into ROM at the moment, even though NMI and IRQ are tied high...)

I am using the Kowalski Assembler/Simulator to produce code at the moment, which I integrate into Xilinx's ISE in a ROM file.

The code I have made to test the VGA at the moment is this:



Nothing spectacular (there are tons of ways even just to improve that code, even if jut by adding labels for the vectors...), just a quick way to test the hardware. I plan on implementing some more complete tests/software later on.

Here is a report from the ISE on resource usage:



The actual output on a monitor is as such:
Sorry for the terrible quality, I'm using my phone at the moment, since I can't find my camera charger...



On a side note, I'd like to thank the members of this forum for the many discussions I have read and that inspired me to make this... I've been following this forum a long time, but have been more of a silent type here because my schedule is often filled, and when I wanted to start making microprocessor systems, I was motivated but lacked the knowledge... after some 5 years of university level education, things tend to make more sense... So many thanks!

EDIT: Added ISE Report and board used.

Looking good! You should be able to avoid resynthesis if all you did was change the content of initialised memory - see this thread:
viewtopic.php?f=10&t=2575

Hello again,

I've made some progress - I've gotten PS/2 Keyboard input, Color (3-bit color so 8 colors), and a way to upload the ROM via the UART on my development board. I tried implementing 16 colors à la "VGA Mode 0" by turning off the RGB lines every screen frame, but at 30 Hz it was too flickery, so for now I just ignore the intensity bit. So for now, the VRAM is as such: every even byte is the ASCII character to be displayed on the screen , and every odd byte is the style (background/foreground color and blinking foreground). The "style" byte is as so: BGGGIFFF, where B is for blinking, GGG is the RGB color triplet for the background, I is the intensity, and FFF the foreground RGB color triplet.

The PS/2 input is done using VHDL code from here, although I did modify the code so that it would work properly with the 65C02's interrupt line. The only problem is that I only have an AZERTY keyboard available, so I do tend to type in the wrong characters ... It's qutie useful as it convert PS/2 scancodes straight into ASCII characters, even for things like Ctrl^C or Ctrl^H.

I've also used the following core in order to upload code straight to the ROM space on the board, and it works relatively well (under 5s for an upload with the binary mode included in the core).

I usually do try and develop everything on my own (usually to avoid any licensing/IP issues, and because I do think that learning in detail about the things you use helps you to understand them), but I'm trying to save some time and also learn how to trust and adapt to other people's code, because inevitably that will probably happen when I'm done with my studies and have to start working.

The system memory map is now as follows:



And I'm writing a monitor ROM at the moment.

Here is a photo of the video output:



It's all green because the VRAM loads by default with 0x20 (space in ASCII, green in background color for style), as I was debugging several issues with the style part of the display and testing the 80x50, as opposed to 80x60 characters 640x480 VGA can support.
The complete top left character is blinking, normally it's an "H" as well
There are still remains from when I tried to do the 16 colors, as normally the rightmost Hs are supposed to be less intense.