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CPLD replacement with FPGA
http://forum.6502.org/viewtopic.php?f=10&t=2759		 Page 1 of 2
Author:  lordbubsy [ Thu Oct 31, 2013 12:50 pm ]
Post subject:  CPLD replacement with FPGA
I’m exploring programmable logic with Xilinx CPLD’s and ABEL. As I understand, this is rather obsolete. I would stick to CPLD’s if I could get larger ones like XC95108XL-PC84.
With kind help I’m now able to make a simple address decoding a reset circuit and a clock divider.

I would like to do VGA (256x240) and who knows what else if I understand it well enough.

An ideal candidate seems a GODIL_XC3S250E DIL FPGA module (€39,-) or a Mercury FPGA Development Board ($49,-).
http://shop.trenz-electronic.de/catalog ... cts_id=632
http://micro-nova.com/mercury

I could keep using ISE, but not ABEL. I’d have to choose another language, but which? (Verilog?)

I have a parallel cable III, which isn’t sufficient? What is a relative cheap programmer to use?
Author:  BigEd [ Thu Oct 31, 2013 1:25 pm ]
Post subject:  Re: CPLD replacement with FPGA
I have a GOPLPC parallel cable adapter which works with the GOP boards. Generally you do need a genuine parallel port, not a USB-printer adapter. I keep a very old laptop alive for this purpose.
A grey import Platform cable USB can be had for $40-$50: see http://www.ebay.com/bhp/xilinx-platform-cable-usb for example.
If you already have a Raspberry Pi, or you like the idea of using one as a general 3V interfacing device, see http://www.raspberrypi.org/phpBB3/viewt ... 41&t=51293 and nearby discussions.
Cheers
Ed
Author:  lordbubsy [ Thu Oct 31, 2013 1:35 pm ]
Post subject:  Re: CPLD replacement with FPGA
BigEd wrote:
I have a GOPLPC parallel cable adapter which works with the GOP boards.
So I could use my parallel cable III.
Quote:
I keep a very old laptop alive for this purpose.
I’m also using an older P4 with Windows XP and a genuine parallel port.

I’d like to use it strictly for 5V application.
Author:  yzoer [ Thu Oct 31, 2013 8:03 pm ]
Post subject:  Re: CPLD replacement with FPGA
I'd 'splurge' and go with an Altera (http://www.altera.com/products/devkits/altera/kit-terasic-cyclone-v-gx-starter.html)board or something similar. If you're partial to Xilinx, check out http://www.digilentinc.com/Products/Catalog.cfm?NavPath=2,400&Cat=10. You can find great boards for around $100-150 and while they cost more, they offer a ton of value. They also don't need a JTAG programmer and work out-of-the-box with their development tools, which is one thing I've had problems with in the past from clone-boards made in China.

For your application, I'd recommend going with an FPGA or, alternatively looking at the Lattice's MachXO2. They also have boards available, as cheap as $30 and again work out of the box with their tools. For example, here's Mouser's offering of Lattice Boards: http://www.mouser.com/Search/Refine.aspx?Keyword=machxo2+board

Last but not least, for your application I'd go with an FPGA rather than a CPLD as you quickly grow out of space once you get stuff up and running and you want to add more features.

Hope this helps!

Yvo
Author:  enso [ Thu Oct 31, 2013 10:03 pm ]
Post subject:  Re: CPLD replacement with FPGA
Tooting my own horn, I still have a bunch of $20 DILDAR50 boards. http://forum.6502.org/viewtopic.php?f=10&t=2638&p=27931...

These have a lot of logic, and come with a 100MHz 6502 with 8K of RAM and a bootloader (load via a built-in 3.3V serial port). Programmable using a standard Xilinx USB cable.
Author:  lordbubsy [ Thu Oct 31, 2013 11:33 pm ]
Post subject:  Re: CPLD replacement with FPGA
That are really nice boards, and surely offer a lot of value for the money.
But it’s not my cup of tea, I’m basically looking for a 5V complaint 84 pin FPGA substitution. Providing glue logic for starters.

Hi enso, I’m following your board(s) and the DILDAR has a lot more I/O pins then the CHOCHI. I’ll look into it more deeply. I don’t know if I can interface it with the MOS6502, but for sure with the W65C02 / W65C816.

My question remains which language is the most common? Sorry if it’s a very basic or obvious question.
Author:  enso [ Thu Oct 31, 2013 11:50 pm ]
Post subject:  Re: CPLD replacement with FPGA
For FPGAs Verilog is the language I like. The other option is VHDL, but it's a lot more verbose.

As far as I understand, 3.3V Spartan3 FPGAs will work with 5V logic - they just require a resistor. I haven't tried, but 3.3V logic seems like it would trigger CMOS levels.

The modern FPGAs are steering away from 5V...

I've been thinking about using the 100MHz 6502 core on DILDARs to simulate logic and IO chips in software, using 6502 assembly... It's so much faster than the real 65C02 that it should be possible.
Author:  ElEctric_EyE [ Fri Nov 01, 2013 2:11 am ]
Post subject:  Re: CPLD replacement with FPGA
lordbubsy wrote:
...My question remains which language is the most common?...

There are several expert Verilog contributors here, namely Arlet, MichaelM and some others that rarely pop in. I would consider myself a 1yr novice of Verilog. Also enso has shown some skill in Verilog. VHDL has been present in some threads here, but no real active contributors.
You must choose which is most common, but it's great to see you tackling HDL! More people here should do this.

enso wrote:
...The modern FPGAs are steering away from 5V...

3.3V logic/memory is the new norm. 5V IC's are a dying breed. Even the 3.3V memory I see nowadays is 2.5V compatible, so 3.3V might be on the way out for high speed memory in the near future.
The Spartan 6 FPGA core pins are powered by 1.2V, the IO pins are powered by 1.2V/2.5V/ or 3.3V. These are just examples of main ICs (external RAM and FPGA) needed to make an advanced basic computer.
If you really favor a 5V IC, chances are it is slow. A logic level interface can be built for it, but I wouldn't think about populating a bunch of 5V IC's around a 3.3V FPGA. It can be done, but it will be at such a cost of board real estate, not to mention the time spent on troubleshooting.
I would recommend looking at some of the new IC's out there.
Know who the major IC manucaturers are first of all, then peruse their sites and search your function.
Finally look the IC datasheet. Speed, current, available packages, operating voltages. Then look for application notes of more complicated IC's...I always recommend this!
Author:  Arlet [ Fri Nov 01, 2013 6:51 am ]
Post subject:  Re: CPLD replacement with FPGA
enso wrote:
3.3V logic seems like it would trigger CMOS levels.

It depends, so carefully check the datasheets for input/output voltage levels for the parts you want to use.
Author:  enso [ Fri Nov 01, 2013 2:33 pm ]
Post subject:  Re: CPLD replacement with FPGA
It is certainly a good idea to check the datasheets for required voltage levels for your chips.

My favourite resource is this chart of levels:
http://www.interfacebus.com/Chart-IC-Voltage-Switching-Levels-Grpah.png

I haven't checked for accuracy (I hope it's better than the spelling of Graph as Grpah), but it looks right.
Author:  lordbubsy [ Fri Nov 01, 2013 3:53 pm ]
Post subject:  Re: CPLD replacement with FPGA
enso wrote:
I've been thinking about using the 100MHz 6502 core on DILDARs to simulate logic and IO chips in software, using 6502 assembly... It's so much faster than the real 65C02 that it should be possible.
I’m not sure how you mean that?



ElEctric_EyE wrote:
but it's great to see you tackling HDL!
well, I’m just sniffing at the possibilities, and FPGA looks quite intimidating and of course massive overkill for just using it as glue logic.


I’ll have to let it sink a little and look at some Verilog and FPGA tutorials.
Author:  yzoer [ Fri Nov 01, 2013 6:00 pm ]
Post subject:  Re: CPLD replacement with FPGA
lordbubsy wrote:
That are really nice boards, and surely offer a lot of value for the money.
But it’s not my cup of tea, I’m basically looking for a 5V complaint 84 pin FPGA substitution. Providing glue logic for starters.


I'm kinda in the same boat. While 5V devices are definitely getting scarcer, they're usually then only ones that have through-hole versions. While they're slower, it's a lot easier to prototype. I also don't need anything over 50mhz, really. With that in mind, I'm using Altera's EPF10k10 (576LE) for my main project and/or EPM7xxx for CPLD's. eBay's great for sourcing them from China.

Btw, make sure you get the 'S' version so you can use JTAG.

-Yvo
Author:  barrym95838 [ Fri Nov 01, 2013 8:05 pm ]
Post subject:  Re: CPLD replacement with FPGA
lordbubsy wrote:
...I’m not sure how you mean that?

I think that enso is speculating that he may be able to successfully simulate (or is it emulate?) one or more I/O devices in 6502 machine language, at about 33 (8-bit) MIPS.

Quote:
I’ll have to let it sink a little and look at some Verilog and FPGA tutorials.

That's on my 'to-do' list as well. If you find any links that are particularly good, could you share them with me, please?

Thanks,

Mike
Author:  enso [ Fri Nov 01, 2013 8:11 pm ]
Post subject:  Re: CPLD replacement with FPGA
lordbubsy wrote:
I’m not sure how you mean that?

What I mean is that a 100MHz 6502 with enough IO ports can just monitor the IO pins connected to the address bus and control pins and respond as if it were a VIA or whatever peripheral chip. At 100MHz the core has many cycles for every 'real' 65C02 cycle.
Author:  lordbubsy [ Sat Nov 02, 2013 12:10 am ]
Post subject:  Re: CPLD replacement with FPGA
All those new (to me) terms are overwhelming, but it’s absolutely fascinating!

yzoer wrote:
I'm using Altera's EPF10k10 (576LE) for my main project and/or EPM7xxx for CPLD's. eBay's great for sourcing them from China.

Btw, make sure you get the 'S' version so you can use JTAG.

-Yvo
You mean the EPF10K10LC84 84-PLCC? That’s one hell of a chip! It is a CPLD, or not? How does the complete tool chain look like?

barrym95838 wrote:
I think that enso is speculating that he may be able to successfully simulate (or is it emulate?) one or more I/O devices in 6502 machine language, at about 33 (8-bit) MIPS.
OK, that’s an original approach, I really didn’t get that. :-)

Quote:
That's on my 'to-do' list as well. If you find any links that are particularly good, could you share them with me, please?
Gladly Mike, I came across this very basic overview to programmable logic.
http://www.barrgroup.com/Embedded-Syste ... able-Logic

It’s not what you asked for, but I found it useful.

This is also very obvious to find, but it’s really massive informative.
http://en.wikipedia.org/wiki/Verilog#Tu ... _resources
It’s worth for hours and hours of entertainment, errrm learning.

I must say that Daryl has all his sources on his website and he helped me through the very first steps in ABEL. I’m beginning to understand how it all works more and more. It’s a shame I have to switch to verilog.

At this point, I could achieve the most and quickest with a Xilinx XC95108-7PC84C , it has 69 I/O’s and has a hobby friendly package.

Time will learn...

enso wrote:
What I mean is that a 100MHz 6502 with enough IO ports can just monitor the IO pins connected to the address bus and control pins and respond as if it were a VIA or whatever peripheral chip. At 100MHz the core has many cycles for every 'real' 65C02 cycle.
Yes, Mike already cleared me up. I can only imagine how fast a 100MHz 6502 is.
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