It looks like Ricoh 5A22. Isn't it?

http://www.google.com/patents?id=dUceAA ... &q&f=false

I don't know that CPU - is it a 65816? This one is like an extended '816 - two 8/16 bit accumulators, and prefix bytes for opcodes.

(I note the superNES has multiply and divide hardware, but by way of a memory mapped coprocessor: http://www.zophar.net/fileuploads/2/10783tclxx/mult.txt)

By the way, welcome to the forum! And thanks for the interesting patent pointer.

I looked a little more at this. The Ricoh 5A22 is the chip in the SuperNES which is said to contain a variant 65816, plus DMA engines. The SuperNES has multiplication/division facility, but from the doc above, that mult/div capability is memory-mapped so presumably performed by the APU chip. The SuperNES was released in 1990.

On the other hand, you've found US patent 5511173, filed on Jan 5, 1994 which describes an implementation scheme for a microprocessor, and a partial description of a particular microprocessor. That micro looks like an extended '816:
- it allows for one of two alternate prefix bytes (more likely, two sets of byte values) which extend the instruction set
- so for example offers a set of 16 branch conditions which can take 8-bit or 16-bit offsets
- can also branch to the content of a (16-bit) register
- it offers 2-operand instructions (the second operand is a relative address offset)
- the ALU contains hardware to support a multiplication instruction
- there's a division instruction
- there are 4 16bit-registers (two of which are also accessible as byte-pairs) compared to the 816's 3 registers (A/B, X and Y)

As the opcodes for the 16 branches are described as being $00 to $0f, it seems that we're not using '816 instruction encoding at all. The patent says that only frequently used instructions use an unprefixed format, and that the prefix bytes contain address mode information. (So my initial thought that $02 and $42 would be the two possible prefix bytes, allowing 700-odd instructions, doesn't fit.)

I'm inclined to say that the patent describes a CPU which is like an '816, more capable, but not binary compatible.

It seems a SuperNES cartridge can contain an SA-1 CPU (for example in 1996 game "Super Mario RPG: Legend of the Seven Stars"), which is described as a faster '816. But because of the opcode encoding difference, I don't think this patent describes the SA-1.

The actual claims of the patent are for a CMOS PLA structure with multiple AND planes - so we're free to build this CPU as an FPGA!

I've captured some diagrams from the patent. (The FPR is the Fast Page Register, the '816's D, or direct page register.)

Cheers
Ed

Hello,

There is a very similar patent that filed in 1990.