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Arlet's 6502 core - undoc'ed opcode support http://forum.6502.org/viewtopic.php?f=10&t=2302 |
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Author: | enso [ Sat Oct 13, 2012 12:28 am ] |
Post subject: | Arlet's 6502 core - undoc'ed opcode support |
Arlet (and others), I got confused by following the state machine decoder for undocumented opcodes. Could you please clarify what the core does? Undefined? Random stuff? Matching 6502 for all or some instructions (which ones)? Any 65C02 or Rockwell or WDC instructions? Thanks, and sorry if it's been covered elsewhere (couldn't find a clear answer). |
Author: | Arlet [ Sat Oct 13, 2012 7:08 am ] |
Post subject: | Re: Arlet's 6502 core - undoc'ed opcode support |
enso wrote: Arlet (and others), I got confused by following the state machine decoder for undocumented opcodes. Could you please clarify what the core does? Undefined? . The behavior for undocumented opcodes is undefined. This was done on purpose, to allow the synthesis tools to pick the smallest implementation for the documented opcodes. The designers of the NMOS 6502 took a similar approach, but because their implementation was completely different, the behavior of the undocumented opcodes will be different too. In any case, you should not use any of the undocumented opcodes, unless you modify the code to provide support for them. |
Author: | enso [ Sat Oct 13, 2012 4:13 pm ] |
Post subject: | Re: Arlet's 6502 core - undoc'ed opcode support |
Just to be clear, are the following instruction considered undefined? 80 BRA rel 12 ORA indirect 32 AND indirect 52 EOR indirect 72 ADC indirect 92 STA indirect B2 LDA indirect D2 CMP indirect F2 SBC indirect 04 TSB zeropage 14 TRB zeropage 34 BIT zpg,X 64 STZ zpg 74 STZ zpg,X 89 BIT imm 1A INC A 3A DEC A 5A PHY 7A PLY DA PHX FA PLX 0C TSB absolute 1C TRB absolute 3C BIT abs,X 7C JMP ind,x 9C STZ absolute 9E STZ abs,x Thank you |
Author: | Arlet [ Sat Oct 13, 2012 4:16 pm ] |
Post subject: | Re: Arlet's 6502 core - undoc'ed opcode support |
enso wrote: Just to be clear, are the following instruction considered undefined? 80 BRA rel 12 ORA indirect 32 AND indirect 52 EOR indirect 72 ADC indirect 92 STA indirect B2 LDA indirect D2 CMP indirect F2 SBC indirect 04 TSB zeropage 14 TRB zeropage 34 BIT zpg,X 64 STZ zpg 74 STZ zpg,X 89 BIT imm 1A INC A 3A DEC A 5A PHY 7A PLY DA PHX FA PLX 0C TSB absolute 1C TRB absolute 3C BIT abs,X 7C JMP ind,x 9C STZ absolute 9E STZ abs,x Thank you Correct. Only NMOS instructions are supported, the green ones from this table |
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