Arlet wrote:
...In any case, try not to use really dry braid. If it works too well, it sometimes leaves too little on the pin. Instead, if it gets saturated, only cut off the end, but leave the half-saturated part. It's a matter of trial and error and experience to see how much you need.
Yeah, I used dry braid and it really took up the solder. I went back over the pins with the solder tip. We'll see if I was successful...
Last post with code passed syntax check and was able to make a symbol, but it did not synthesize. SRA was a reserved name, so had to change it, also SRCS was wrong value. I did not have the SyncRAM address outputs registered like I did with the databus outputs and got a multiple driver error. So I fixed it, and it passes sythesis. I tried it out. Getting totally random pixels all the time. Timing not right. But it's something!
Code:
module SRAMif( output reg [20:0] SRAddr = 0, //SyncRAM address bus
output reg WEn = 1, //SyncRAM R/W, always read
output reg SRCLK = 0, //SyncRAM clock
output reg SRCS = 1, //SyncRAM chip select
input [15:0] SRD, //SyncRAM databus
output reg [4:0] Red_data, //
output reg [5:0] Green_data, //videoDAC databus, always write
output reg [4:0] Blue_data, //
input clk50, //50MHz main clock
input pclk, //25MHz pixel clock
input hstart,
input vstart,
input hblank
);
reg [20:0] SRAddrtemp;
reg [15:0] SRDtemp;
reg countflag;
always @(posedge clk50)
SRCLK <= ~SRCLK; //pixel clk is SyncRAM clk
always @(posedge clk50)
if ( pclk )
if ( hstart )
countflag <= 1; //countflag active in display area
else if ( hblank )
countflag <= 0;
always @(posedge clk50)
if ( hstart & vstart ) //reset address counter at top left of screen
SRAddrtemp <= 0;
else if ( countflag )
SRAddrtemp <= SRAddrtemp +1; //increment RAM address counter
always @(posedge clk50)
if ( pclk & countflag )
SRDtemp <= SRD; //latch incoming data
always @(posedge clk50)
if ( pclk & countflag )
begin
Red_data <= SRDtemp [15:11]; //outgoing data to videoDAC
Green_data <= SRDtemp [10:5];
Blue_data <= SRDtemp [4:0];
end
always @(posedge clk50)
if ( pclk & countflag )
SRAddr <= SRAddrtemp; //outgoing address
endmodule
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Good job!
