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PostPosted: Mon Jul 15, 2013 2:52 pm 
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To make it more interesting here is the flow of a new idea for the test:
1) Clear screen to red.
2) Plot green cube.
3) Plot yellow circle intersecting cube.
4) Copy 76x76 pixel square region and paste to the right
5) Plot hex value of RNG in blue
6) Delay
7) Loop to Step 4.

Successfully working with everything in BRAM. Now when the PLTRNG subroutine is in video ram, the proof will be in the pixels to the bottom left of the display. Hope it works!


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P1040075.JPG
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PostPosted: Mon Jul 15, 2013 3:37 pm 
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Ah, it's not going to work because the address gets mangled to optimize for plotting, sorry!:
Code:
always @*                                        //optimize the videoRAM address for plotting (X,Y) in the (LSB,MSB) for indirect indexed
    begin                                       //CB1 = 0, page flipping
         cpuABopt    [20] <= CB0;               //bank bit
         cpuABopt [19:10] <= cpuAB [31:16];      //Y[9:0]
         cpuABopt   [9:0] <= cpuAB [15:0];      //X[9:0]      
   end

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PostPosted: Mon Jul 15, 2013 5:31 pm 
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I found a midpoint ellipse program here. It hurts my brain to try to convert it today, but I will post the algorithm here with the author's name, in case something happens to the website, and think on it for the next week or so.
Code:
#include<stdio.h>
#include<conio.h>
#include<graphics.h>
#include<math.h>
void disp();
float x,y;
int xc,yc;
void main()
{
int gd=DETECT,gm;
int a,b;
float p1,p2;
clrscr();
initgraph(&gd,&gm,"");
scanf("%d%d",&xc,&yc);
scanf("%d%d",&a,&b);
x=0;y=b;
disp();
p1=(b*b)-(a*a*b)+(a*a)/4;
while((2.0*b*b*x)<=(2.0*a*a*y))
{
x++;
if(p1<=0)
p1=p1+(2.0*b*b*x)+(b*b);
else
{
y--;
p1=p1+(2.0*b*b*x)+(b*b)-(2.0*a*a*y);
}
disp();
x=-x;
disp();
x=-x;
}
x=a;
y=0;
disp();
p2=(a*a)+2.0*(b*b*a)+(b*b)/4;
while((2.0*b*b*x)>(2.0*a*a*y))
{
y++;
if(p2>0)
p2=p2+(a*a)-(2.0*a*a*y);
else
{
x--;
p2=p2+(2.0*b*b*x)-(2.0*a*a*y)+(a*a);
}
disp();
y=-y;
disp();
y=-y;
}
getch();
closegraph();
}
void disp()
{
putpixel(xc+x,yc+y,10);
putpixel(xc-x,yc+y,10);
putpixel(xc+x,yc-y,10);
putpixel(xc+x,yc-y,10);
}
//# Author: J.Ajai
//#Mail-id- ajay.compiler@gmail.com
//# PH:+91-9790402155

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PostPosted: Mon Jul 22, 2013 10:49 pm 
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An even better site!
Taken from their site:
Features of the rasterising algorithm:

Universal:
Fast:
Simple:
Exact:
Smooth:
Flexible:

This algorithm plots lines, circles, ellipses, Bézier curves and more
Draws complex curves nearly as fast as lines.
Short and compact implementation.
No approximation of the curve.
Apply anti-aliasing to any curve.
Adjustable line thickness.
The principle of the algorithm could be used to rasterize any curve.
Copyright © Alois Zingl, Vienna, Austria, Email: easyfilter@chello.at, last update December 2012.

Line:
Code:
A simple example of Bresenham's line algorithm.
void plotLine(int x0, int y0, int x1, int y1)
{
   int dx =  abs(x1-x0), sx = x0<x1 ? 1 : -1;
   int dy = -abs(y1-y0), sy = y0<y1 ? 1 : -1;
   int err = dx+dy, e2; /* error value e_xy */
 
   for(;;){  /* loop */
      setPixel(x0,y0);
      if (x0==x1 && y0==y1) break;
      e2 = 2*err;
      if (e2 >= dy) { err += dy; x0 += sx; } /* e_xy+e_x > 0 */
      if (e2 <= dx) { err += dx; y0 += sy; } /* e_xy+e_y < 0 */
   }
}

Circle:
Code:
This is an implementation of the circle algorithm.
void plotCircle(int xm, int ym, int r)
{
   int x = -r, y = 0, err = 2-2*r; /* II. Quadrant */
   do {
      setPixel(xm-x, ym+y); /*   I. Quadrant */
      setPixel(xm-y, ym-x); /*  II. Quadrant */
      setPixel(xm+x, ym-y); /* III. Quadrant */
      setPixel(xm+y, ym+x); /*  IV. Quadrant */
      r = err;
      if (r <= y) err += ++y*2+1;           /* e_xy+e_y < 0 */
      if (r > x || err > y) err += ++x*2+1; /* e_xy+e_x > 0 or no 2nd y-step */
   } while (x < 0);
}

Ellipse:
Code:
This program example plots an ellipse inside a specified rectangle.
void plotEllipseRect(int x0, int y0, int x1, int y1)
{
   int a = abs(x1-x0), b = abs(y1-y0), b1 = b&1; /* values of diameter */
   long dx = 4*(1-a)*b*b, dy = 4*(b1+1)*a*a; /* error increment */
   long err = dx+dy+b1*a*a, e2; /* error of 1.step */

   if (x0 > x1) { x0 = x1; x1 += a; } /* if called with swapped points */
   if (y0 > y1) y0 = y1; /* .. exchange them */
   y0 += (b+1)/2; y1 = y0-b1;   /* starting pixel */
   a *= 8*a; b1 = 8*b*b;

   do {
       setPixel(x1, y0); /*   I. Quadrant */
       setPixel(x0, y0); /*  II. Quadrant */
       setPixel(x0, y1); /* III. Quadrant */
       setPixel(x1, y1); /*  IV. Quadrant */
       e2 = 2*err;
       if (e2 <= dy) { y0++; y1--; err += dy += a; }  /* y step */
       if (e2 >= dx || 2*err > dy) { x0++; x1--; err += dx += b1; } /* x step */
   } while (x0 <= x1);
   
   while (y0-y1 < b) {  /* too early stop of flat ellipses a=1 */
       setPixel(x0-1, y0); /* -> finish tip of ellipse */
       setPixel(x1+1, y0++);
       setPixel(x0-1, y1);
       setPixel(x1+1, y1--);
   }
}

Bezier Curve:
Code:
This program example plots a quadratic Bézier curve limited to gradients without sign change.
void plotQuadBezierSeg(int x0, int y0, int x1, int y1, int x2, int y2)
{                           
  int sx = x2-x1, sy = y2-y1;
  long xx = x0-x1, yy = y0-y1, xy;         /* relative values for checks */
  double dx, dy, err, cur = xx*sy-yy*sx;                    /* curvature */

  assert(xx*sx <= 0 && yy*sy <= 0);  /* sign of gradient must not change */

  if (sx*(long)sx+sy*(long)sy > xx*xx+yy*yy) { /* begin with longer part */
    x2 = x0; x0 = sx+x1; y2 = y0; y0 = sy+y1; cur = -cur;  /* swap P0 P2 */
  } 
  if (cur != 0) {                                    /* no straight line */
    xx += sx; xx *= sx = x0 < x2 ? 1 : -1;           /* x step direction */
    yy += sy; yy *= sy = y0 < y2 ? 1 : -1;           /* y step direction */
    xy = 2*xx*yy; xx *= xx; yy *= yy;          /* differences 2nd degree */
    if (cur*sx*sy < 0) {                           /* negated curvature? */
      xx = -xx; yy = -yy; xy = -xy; cur = -cur;
    }
    dx = 4.0*sy*cur*(x1-x0)+xx-xy;             /* differences 1st degree */
    dy = 4.0*sx*cur*(y0-y1)+yy-xy;
    xx += xx; yy += yy; err = dx+dy+xy;                /* error 1st step */   
    do {                             
      setPixel(x0,y0);                                     /* plot curve */
      if (x0 == x2 && y0 == y2) return;  /* last pixel -> curve finished */
      y1 = 2*err < dx;                  /* save value for test of y step */
      if (2*err > dy) { x0 += sx; dx -= xy; err += dy += yy; } /* x step */
      if (    y1    ) { y0 += sy; dy -= xy; err += dx += xx; } /* y step */
    } while (dy < dx );           /* gradient negates -> algorithm fails */
  }
  plotLine(x0,y0, x2,y2);                  /* plot remaining part to end */
}


I'm actually making some progress modifying the current circle algorithm for ellipse. I found this site during "downtime" waiting for an implementation to complete.

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PostPosted: Mon Jul 22, 2013 11:45 pm 
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I call this "primordial" success. Modifying the C program I found on Wikipedia I had posted earlier to Verilog and multiplying the X axis by 2.
Far from perfect but headed in the right direction...
Also, you can see the snow interfering with the real pic. The next hardware design will get rid of this annoyance, but for now I try to squeeze everything I can from this board.
EDIT: I need to fix the timing as the multiply is taking up a cycle. But I will try just adding a certain amount 1st, although this will still take up a cycle. I just need to remove my dummy cycle I had inserted for proper timing.


Attachments:
1stEllipseXmajor.JPG
1stEllipseXmajor.JPG [ 109.16 KiB | Viewed 1011 times ]

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PostPosted: Tue Jul 23, 2013 7:06 pm 
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Once the ellipse portion is completed, I would like to add a cpu flag that will control the PlotGen module so it can write to videoRAM or a 2Kx16 BlockRAM that the cpu can address. There will also be an offset register that will store the last offset address that the PlotGen module writes to. Basically it will just be a pixel counter. This way the cpu will know where the last pixel is, no matter the size or shape of the line, circle or ellipse.

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PostPosted: Wed Jul 24, 2013 3:13 am 
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Quote:
This program example plots an ellipse inside a specified rectangle.


I always did think this was a better way to specify ellipses anyway. All you need is two points, and you can derive all the information you need to plot a line, a square outline, a filled rectangle, an ellipse, or a circle (sort of a degenerate ellipse).


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PostPosted: Wed Jul 31, 2013 8:54 pm 
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An update: I was away on seeing the family past 4 days...

I came back and dove right in to placing a few components for a 2nd parallel video board to be soldered using my new hot plate construct. I set the temp to 260C. While waiting for the plate to get to temp, flux was placed along the pins of the SyncRAM, FPGA, 2 PROMs, and PROM MUX. Then the devices were carefully placed. After the hotplate reached 260, I placed the board on the hotplate and measured the board temp at 110C almost immediately. After the board temp was measured at just over 170C after a few seconds, it looked like all the solder had melted very nicely and the flux just disappeared and went up in smoke. No extra solder was added. I then removed the board and shut down the hotplate. Then the 1.2V & 2.5V regulators and main bypass caps were soldered in by hand underneath.

I'm now in the process of making a wiring harness for the power and JTAG connections that can span multiple boards. Then I can test this new way of soldering.

Notice there's no oscillator, as it is jumpered for an external main clock-in from the first PVB.


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PostPosted: Wed Jul 31, 2013 11:04 pm 
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Well, ISE did not see the FPGA or PROMs until I re-touched up each and every pin with a soldering iron tip, although I did not have to add extra solder anywhere. This makes for QFP mounting cleaner/quicker/easier. But for BGA mounting this hot plate solution still leaves me doubtful.

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PostPosted: Thu Aug 01, 2013 1:46 am 
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0.5mm QFPs are much harder to solder then BGAs. At this point I can solder a BGA without any problems, but every QFP I do requires rework with a copper braid to fix the inevitable solder bridging. Also, QFPs require a stencil and paste, while BGAs go on dry. Placing the chips is much harder as well, largely because of the paste, but also due to smaller pitch.

Stencils for QFPs are very hard to cut on a lasercutter. I've given up on cutting rectangular pads and just cut short lines, one per pad. Many of my QFPs are placed at a 45 degree angle, and diagonal cuts are much less accurate, so I have to rotate the entire stencil 45 degrees to align the QFP for horizontal/vertical cuts.

0.5mm QFPs are in fact the most difficult packages to solder, in my experience.

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PostPosted: Tue Aug 06, 2013 2:58 pm 
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enso wrote:
...0.5mm QFPs are in fact the most difficult packages to solder, in my experience.

I'm now inclined to agree with you. I must have got lucky assembling the first PVB, I don't remember it being such a hassle.
What a battle it was to get a second PVB working. I had to add in the videoDAC and VGA connector to test it properly. In the end I slightly overdid the soldering on all ICs, then went by with solderwick and dragged it by each pin. Now I have 2 boards working. I look forward to 1mm BGA!

EDIT: 2 boards are powered up and in adjacent slots on the backplane.
1st test was to run both boards. PVB 1 is considered the master and feeds PVB2 the master clock from the 100MHz can oscillator. The can oscillator on PVB2 is disabled, putting it's output in a high Z state so the FPGA can receive the clock from PVB1.
Probably not the best practice as the oscillator only outputs 8mA.
There are provisions so that PVB2 receives HSYNC, VSYNC and Pixel clock so the 2 boards can be in sync.
Anyway, both boards are presently functioning simultaneously and outputting the same graphics through both of their VGA connectors.

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Last edited by ElEctric_EyE on Tue Aug 06, 2013 6:08 pm, edited 1 time in total.

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PostPosted: Tue Aug 06, 2013 4:18 pm 
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enso wrote:
0.5mm QFPs are much harder to solder then BGAs. At this point I can solder a BGA without any problems, but every QFP I do requires rework with a copper braid to fix the inevitable solder bridging.


What opening size do you use in the stencil for the QFP pads ? They should be 75%-80% of the area of the pad itself. If you have excessive bridging, maybe the opening is too big.

I have developed a fairly effective technique for hand soldering 0.5 mm QFP. If people are interested, I can write a short explanation with some detail photos.


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PostPosted: Wed Aug 07, 2013 1:12 pm 
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Maybe enso is busy on a project, I for one am always eager to learn new and better methods of mounting ICs. BTW I had to dismount a S6 with hot air gun because I was fearful it was non functional because I pulled it off another board, and remount a new S6. Wasn't too bad of an experience. I kept the old S6, since even with the new S6, the soldering job was not 100% yet...

On another note I have video passing from PVB1 to PVB2!
Just a quick down and dirty
Code:
//output data to videoDAC
always @(posedge clk)
   begin
      Rout <= countflag ? Rin : 0;
      Gout <= countflag ? Gin : 0;
      Bout <= countflag ? Bin : 0;
   end

Timing is off, everything is scrolling to the left by itself and sometimes 2 pixels wide but the traveling data and signal integrity seem to be pretty good.
Right now I have 2 separate HVSync modules run by the same clock. Maybe time to sync PVB2 by using HSYNCin, VSYNCin and PCLKin and rewrite PVB2 HVSync module.

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PostPosted: Sat Aug 10, 2013 11:26 pm 
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Was thinking about this a little more, and I'm going to ditch my previous idea of a new version of the PVB where there are 2 very fast SyncRAM's.
I will spend time on a finalized board design incorporating the fastest 2MBx18 SyncRAM presently available by GSTech. It also has pin controls for flow-through or pipeline data transfer modes.
This should be the final version of the PVB. I'll call it PVBi :wink:, as the previous version is PVB v1.0h. Both v1.0g (with WW corrections) and v1.0h are functioning side by side.

ElEctric_EyE wrote:
...I would like to add a cpu flag that will control the PlotGen module so it can write to videoRAM or a 2Kx16 BlockRAM that the cpu can address. There will also be an offset register that will store the last offset address that the PlotGen module writes to. Basically it will just be a pixel counter. This way the cpu will know where the last pixel is, no matter the size or shape of the line, circle or ellipse.

Instead of the cpu flag choosing to write to the blockRAM or external RAM, I was thinking that the module should naturally always write to the dual-ported blockRAM first in order to take advantage of dual-reads. One read for the video output, one for the cpu simultaneously...
I have alot of work to do, especially on the hardware plotter first.

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PostPosted: Tue Aug 13, 2013 2:09 pm 
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Since, I'm a hardware hands-on type guy, I'm going to find some solace today in transferring all the SMD IC's from the old v1.0g board to the last v1.0h bare board that I own. This way I'll have 2 identical boards running in parallel, thereby negating potential unforeseen timing errors due to different designs. Again, I'll aim for a minimal pass-thru board without a videoDAC, VGA connector etc.

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