I have an Altera development board available and I'd love to get an existing 6502 softcore running on it.
The emulaiton of the CPU doesn't have to be cycle accurate or anything, but it should "behave" like a 6502. It would be nice if the thing was easy to tweak and expand (like adding opcodes, 65C02 functionality, etc...)

I've already looked at download links here and at opencodes.org, but there is so many of them I don't know which to choose.
One of the codes on opencores.org claims to be 100% phase compatible and support 6502, 65C02 and 65816 but unfortunately it seems very optimized, so un-tweakable. Also they say 65C02 and 65816 support is incomplete but they don't say what is not complete. I also don't like the idea the core is a single chip and that a signal selects between 6502, 65C02 and 65816. Why not have them being separate ?

I'd also like to do my own but I don't feel like reinventing the wheel...

If you have developed on or used your development board in any significant way, I would suggest using either Arlet's core, or my core. Arlet's core is constructed in a conventional manner, and it has proven to be easily extended by others on this forum (BigEd and ELectricEyE).

My core is microprogrammed. It uses two block RAMs, one 256x32 and the other 512x32. One block RAM is used for the ALU control and the other is used for implementing the addressing modes and other control functions. I have provided a Windows-compatible microprogram assembler that you can use to easily add additional instructions.

Arlet's core presently implements the behavior of the 6502, and my core provides behavior roughly equivalent to that of the WDC W65C02S microprocessor. My latest release provides a complete microprocessor implementation of using the core targeted to a Xilinx XC3S50A-4VQG100I Spartan-3A FPGA. I have specifically targeted that part ti see how small an FPGA I can fit the core (and supporting logic) into. I am in the processing of building a demo board with that FPGA, but it will be 4-6 weeks before my parts have arrived and I've assembled and tested the board. (Note: I have some objectives for that board which are not related to simple raw speed, so the M65C02 microprocessor targeted to the board is not intended to run at 100MHz or greater, although the core by itself can be coaxed to synthesize and PAR at that speed or greater in a -5 Spartan-3A FPGA.)

Windfall took the core I posted in March/April of 2012 and added the supporting structures around it and targeted a Terasic DE0 Nano Cyclone III development board. Perhaps you can download his demo and see if it's compatible with your development board.

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Michael A.

In fact this is exactly the development board that I have !

I will look into his solution ! Thank you very much.

EDIT : Not very interesting it's closed source and is made for a particular extension board which I do not have. I could modify the design for the extention board I have if I had the source, but alas...

Another problem I see is that all those cores are in verilog... and I only know VHDL (currently).

I'd second Michael's general plan of picking up one of those two cores, in part because the authors are here on the board to answer questions.

But you might want to look at Mike Stirling's BBC Micro on an FPGA project which seems to be on a similar board. It's based on T65 - which, as you say, isn't a C02 or an 816 to any useful degree, but it's well-validated by now, and is VHDL.

Cheers
Ed