If you ever do check the temperature with an infrared thermometer, do let us know how well the PID display correlates.

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In theory, there is no difference between theory and practice. In practice, there is. ...Jan van de Snepscheut

Be aware that IR thermometers don't work well on aluminum, at least not without adjusting. I'd put an empty PCB on the hotplate, and measure that instead.

I was once told by an American colleague that the problem with 110V is that the shock it gives can make you grab and hold onto the conductor (giving you a prolonged shock) where as 230V shocks tend to cause your hand to be kicked back.

When he was in the US Navy he'd be taught to escape from smoke filled submarine compartments using the back of his hand to feel his way around in case there were any live cables.

I can testify that 230-240V gives you quite a kick.

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Andrew Jacobs
6502 & PIC Stuff - http://www.obelisk.me.uk/
Cross-Platform 6502/65C02/65816 Macro Assembler - http://www.obelisk.me.uk/dev65/
Open Source Projects - https://github.com/andrew-jacobs

A PCB with lots of little vias would be more interesting. FR4 is not a great heat conductor, so vias play an important role in heat transfer from the hotplate up to the balls. I even read in some design guide a recommendation to place the dogbone pattern on unused pins to increase the heat mass of the upper level for even heating. It might even be a good idea to put vias on unused pins to move more heat up.

On a different note, I believe that solder balls are 63% tin and 37% xxxsolderxxx lead. According to wikipedia https://en.wikipedia.org/wiki/Soldering#Solders, this mix is eutectic, meaning that it has a melting point of 183C (not a range) - it transitions straight to liquid from solid.

There is a slight heat gradient between the heating elements (my heaters are 80mm apart). This will require setting the temperature a little higher. If there is a next time, I will probably put more heating elements spaced closer together. The current set up is workable, but I have to figure out the temperatures - right now I am just guessing.

In my later, successful experiments, I jammed the plate temperature way up, to 250C. This melts the balls in around 15-20 seconds (I will time it next time). The board then has to be removed quickly (and carefully) to avoid smoking the FR4.

I would like to lower the temperature a little. I know that at around 200 it seemed to take forever to heat it. I had no luck until I set it to 220 or so.

Looking at some profiles on the Internet... I see wave soldering going up to 260C, IR heating to 230C, etc... Perhaps I am not that far off.

Given the complete lack of calibration of any kind, this is not very helpful. I should spring for a thermometer, or at least verify with another thermocouple setup (I am thinking about a PID-controlled toaster oven next).

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In theory, there is no difference between theory and practice. In practice, there is. ...Jan van de Snepscheut

You mean "lead", I suppose. However, due to the EU RoHS directive, many devices are lead-free now. This is annoying, because the lead-free solders have higher melting temperatures, and I generally find them inferior in their soldering ability.


I think the best thing would be to perform a number of test runs to see which temperature setting works best. An IR thermometer could be useful to measure how even the temperature is. Although with the big slabs of aluminum you are using, I would expect decent results. However, the aluminum may be heated evenly, you still need a good board design to make sure the balls all reach the same temperature.

Yes, this is going to be the challenge I'm starting to realize. I've been away from board design for more than 6 months, so some stupid questions:
Is it possible to have a via for every pin of a BGA package? I would think so off the top of my head...
I have a desoldering station which has a hot air gun. Maybe this, in conjunction with the hotplate, would help bring the temps up quicker without cooking the FR4 board material. Not sure if air blowing would move the BGA package though...

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

Generally no.

With reasonable widths, such as 6 mil traces and 13 mil via holes with 7 mil rings, your via will take up the entire space between pins. That means you can't have any other traces going through that square, top or bottom of the via layer.

With 2 layers, as soon as you put a via down, you are finished for that square. The first two rows of balls can go straight out; the third can go to vias and routed out from below; the fourth can go to vias and route out in-between the third row's vias. Finito. In practice you have some power pins that break the pattern.

But anyhow, as soon as you put in two rows of vias you have a perfect roadblock [EDIT] for the board layers those vias penetrate.

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In theory, there is no difference between theory and practice. In practice, there is. ...Jan van de Snepscheut

You can use the hotplate as a pre-heating station for rework. Air pressure is usually adjustable. If you keep the board nice and hot (but not enough to melt the solder or smoke), it makes working with the air tool incredibly responsive.

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In theory, there is no difference between theory and practice. In practice, there is. ...Jan van de Snepscheut

Last week I started to do a power layout for the FT256 Spartan 6 XC6SLX25. In the pic all the GNDs & VCCs are the smallest via's available from EPCB: .026" metal around a .008" hole. The other BGA pads are .016". This will be a 4 layer board, 2 inner layers are power/ground planes. These planes may help disperse the heat from a hotplate more evenly than a 2 layer board.

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

Another success with a 484-pin BGA. 6502 playground rev.C - works like a charm, at least flashing an LED. Power regulators and an oscillator are mounted:

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In theory, there is no difference between theory and practice. In practice, there is. ...Jan van de Snepscheut

Consistency is nice work enso!...

This is my progress so far of a top level layer board so far, without concern for other specialized pins. VIAs are powers/GNDs as mentioned before.

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

You are on your way!

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In theory, there is no difference between theory and practice. In practice, there is. ...Jan van de Snepscheut

Some of the remaining signal pins could be routed to the bottom layer using more vias, but I didn't want to cloud that layout as it shows the most basic number of pins one can easily route using a 16x16 1mm BGA package on one layer.

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

3-D Circuit Boards.

Now one issue that I have been trying to think about out of the box, is bypass capacitor placement. I've seen the layouts with all the bypass caps surrounding the BGA on the top layer. This can be done better IMO.

The one person who inspired me to think out of the box is Garth Wilson, with his idea on placing SMT cap's inside of a via on a 2-layer board. Today I think I figured out a feasible way to implement the same concept, although it is labor intensive, using a 2-layer board (although only the ground plane is used) which is soldered in at the last stage. There may be more uses of the other plane, But here is the process:

Manufacture a 4-layer board made with a 256-pin 1mm BGA, using power/GND vias.
Manufacture a 2-layer bypass capacitor board, same dimensions as the BGA (not the large 4-layer board) with holes drilled at same power/GND via locations. On this board, the vias will be large enough to accommodate the SMT caps. All GND vias with go straight through and connect both boards.
Solder the BGA IC to the top of the 4-layer board.
Solder the bypass caps vertically on each power via on the bottom of the 4-layer board. (this is the tough part)
Place the 2-layer bypass capacitor board on top of all the caps, and solder them in, using the smallest amount of solder, no flux.

The constraints of this idea are:
The width of the BGA power vias will limit pretty much limit the width of the bypass capacitors.
Similarly, the thickness of the bypass board limits the bypass capacitor values.
...

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

Great minds think alike

A week ago I sent off a PCB order to test out the 603 cap inside a via. Unfortunately, oshpark will not do unplated vias, so I put down two pads and will drill it myself. According to oshpark, American fabs will always plate holes with pads on both sides. I found Chinese fabs that will do unplated holes though.

Having thought about it for a while, other than more compact and nicer looking design, it is easier to just keep the caps on the surface. I will report.

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In theory, there is no difference between theory and practice. In practice, there is. ...Jan van de Snepscheut