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PostPosted: Sun Feb 08, 2015 1:30 pm 
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I wasn't sure if I should start this thread in the Hardware section or Programmable Logic section, but I decided to post here since stuff I do usually has less to do with 6502 discrete components and more to do with PLDs using Surface Mount Tech.

For my current project, version 2 of the Parallel Video Board (PVBV2), I've been using Express PCB to manufacture the boards. The boards contain 2 100-pin QFPs, 1 48-pin QFP, 1 256-pin 1mm BGA and some various other IC's.
EPCB has their own proprietary software which is very easy to use. A problem I've run into using their service is that there's no option in the EPCB service for placing a solder-mask over the via ring. A via ring, which has to be placed at the center of 4 BGA pads in order to be properly routed out, has bare copper showing.
The problem occurs when, during mounting the BGA, the solder balls melt and get just a tad wider as the BGA package begins to settle. In some instances, based on my experience, the BGA pads are shorted to the vias.

So, in a search of some decent Windows-compatible 'free or free trial' PCB programs, I'd like to share what I've found. I say 'free trial' because I was willing to pay if the program was decent enough.
Right off the bat Eagle was out of the picture, because in order to route the PCB it seems that one has to start a project from a schematic. I was looking for a program where I could start with the PCB layout, with no schematic needed.

I found 2 very nice free programs, FreePCB and KiCAD.
No attempt is being made here to compare the 2 pieces of software! I respect the amount of man hours one has to spend to create something like these programs and then opt to distribute it freely. I highly encourage anyone who is about to start PCB design to thoroughly check them both out, and if I've overlooked another program, feel free to mention it!
Sidenote: Steve Chamberlain, of Big Mess O' Wires fame, did a comparison between Eagle and KiCAD.

I decided to go with KiCAD as the overall support from the community seems very strong and it also mentions explicitly that no schematic is needed, so I know I'm not wasting my time trying to learn the thing.
The fact that it uses another free program, Wings 3D, which is used by KiCAD for 3D modelling of a board, is a nice indicator of it's strength.
There is also an IRC channel, for feedback and support.
During the searching, I came across an article about CERN supporting KiCAD in EE Times. In the middle is a video of a very powerful feature showing off 'push and shove' routing, watch it!

After a successful run of my first board, which hopefully won't be too long or too expensive, I plan to make a donation.

The layout for PVBV2 is at its infancy, but I realize I need to choose a PCB manufacturing house as I need to choose minimum via size and trace width. So that search begins now...

BTW, in addition to Windows (I'm using Win7 64-bit), KiCAD also works under Linux and OSX.

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PostPosted: Mon Feb 09, 2015 5:18 pm 
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A couple great resources for anyone interested in KiCAD:
Contextual Electronics youtube channel.
KiCAD.info website with forum.

The IRC channel is also great. There's about 150 people in there. A few are active who answered some questions I had.

Most likely will be using eurocircuits to make the boards for the PVBV2 project.

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PostPosted: Mon Feb 09, 2015 11:57 pm 
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Sigh... At this time I cannot use the KiCAD PCB tool only... There was difficulty assigning vias to the power and ground planes. I'll have to start learning all the other schematic related BS... At least it's free...

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PostPosted: Tue Feb 10, 2015 12:23 pm 
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I'm in a similar "pickle". My PCB requirements are trivial compared to most people; I work in mostly through-hole parts, dual layer, with typically 10mil traces. I'm looking at reducing things down a bit to cater for more SMT parts, perhaps going as far as 6mil. To complicate things, I also need tools to let me layout simple PCBs I make up myself. Here the traces are again typically 10mil, with the boards being single sided. To aid in drilling, I use small pad holes regardless of the size of the actual hole required. Obviously it would be great if things like hole sizes could be set across the whole board, though I doubt any tool supports that since it is a "strange" requirement.

I have been using the gEDA suite for the last couple of years and have built up quite a big collection of custom symbols and footprints. Like KICAD, gEDA divorces the two and in fact the footprint to use is simple a property of the symbol. This is IMO good and bad. The gEDA workflow is fairly horrible, with a commandline tool used to push schematic changes into the PCB layout. This requires manually removing footprints which are for components that have been removed from the schematic. So nothing is "integrated", and it is quite error prone. But FWIW, I like working schematic to PCB, and can't really imagine working only with PCB layouts. Anyway, basically I'm now rather tired of dealing with all the oddness in the gEDA suite - inconsistiencies between keyboard shortcuts on both programs, the lack of "push" PCB trace routing, etc, and despite getting some nice boards made up with these tools, I will be looking at KICAD soon. I'm scared by, especially, having to remake all my custom parts.

One question to more knowledgeable folks: A problem with linking the schematic capture and PCB design together comes when programmable logic is used. One of the big advantages with PL (especially as the devices get bigger and bigger) is that the pin routing on the logic pins should be guided by the PCB design not a logical representation (ie. the schematic). As soon as the schematic is drawn that links pins together, the PCB must be made to link these pins and only these pins. Do any PCB/schematic tools out there (which are free or cheap) allow you to express the schematic in such a way that the route can be satisfied by using "any" logic pin? This would certainly make my life easier; I wouldn't have to draw up the schematic in such a way that I end up drawing the physical layout of the FPGA, just so I can get the pin mapping correct from a physical pin-layout perspective. I hope that makes sense.

Please let us know how you get on with KICAD.

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PostPosted: Tue Feb 10, 2015 6:54 pm 
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Aslak3 wrote:
I'm in a similar "pickle". My PCB requirements are trivial compared to most people; I work in mostly through-hole parts, dual layer, with typically 10mil traces.

Every board house I've ever used will go down to .006" trace/space without charging extra or losing reliability.

Quote:
To aid in drilling, I use small pad holes regardless of the size of the actual hole required. Obviously it would be great if things like hole sizes could be set across the whole board, though I doubt any tool supports that since it is a "strange" requirement.

If it's a normal CAD that puts out gerber and excellon files (gerber for the photoplotter and excellon for the drilling), you can edit things like that in the text editor pretty easily. I wouldn't want to have to do large quantities of editing, but to change the size of a group of holes just takes a few seconds in the text editor once the CAD has produced the excellon drill file.

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I'm scared by, especially, having to remake all my custom parts.

That's one thing that keeps me from going to another CAD. I have hundreds of custom PCB symbols I would have to re-make.

Quote:
One question to more knowledgeable folks: A problem with linking the schematic capture and PCB design together comes when programmable logic is used. One of the big advantages with PL (especially as the devices get bigger and bigger) is that the pin routing on the logic pins should be guided by the PCB design not a logical representation (ie. the schematic). As soon as the schematic is drawn that links pins together, the PCB must be made to link these pins and only these pins. Do any PCB/schematic tools out there (which are free or cheap) allow you to express the schematic in such a way that the route can be satisfied by using "any" logic pin? This would certainly make my life easier; I wouldn't have to draw up the schematic in such a way that I end up drawing the physical layout of the FPGA, just so I can get the pin mapping correct from a physical pin-layout perspective.

I believe that's called back-annotation. It's not just with programmable logic, but even with something simple like a quad op amp where you find out when you're laying it out that section A of the quad op amp reaches a certain part of the circuit much better than section C which you originally had in the schematic. It's one of several reasons however that I don't use CAD for my schematics. I just do them by hand, then start laying out the board on CAD.

The RS-274X gerber industry standard for photoplotter files is not complicated. You can learn about it at http://artwork.com/gerber/274x/rs274x.htm . You'd be appalled to see what primitive software I use to make complex multilayer boards, doing things the CAD was never made to be able to do, like shaving a pad to get another trace through a tight space, altering the soldermask in a given area, making co-planar wave guides for 2.4GHz RF, removing pads on layers where a hole does not connect to a trace or plane, etc..

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PostPosted: Tue Feb 10, 2015 6:58 pm 
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Is it called pin-swapping when you have a component (like a 4-input NAND, or a big CPLD) with many inputs which are (or could be) equivalent?


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PostPosted: Tue Feb 10, 2015 8:25 pm 
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Yes, you can swap two inputs with pin-swap.
There is also gate-swap, which allows to swap gates, i.e. to swap two gates like in a dual 4-input NAND IC.

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PostPosted: Wed Feb 11, 2015 12:37 am 
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Aslak3 wrote:
...Do any PCB/schematic tools out there (which are free or cheap) allow you to express the schematic in such a way that the route can be satisfied by using "any" logic pin? This would certainly make my life easier...

GARTHWILSON wrote:
...I believe that's called back-annotation. It's not just with programmable logic, but even with something simple like a quad op amp where you find out when you're laying it out that section A of the quad op amp reaches a certain part of the circuit much better than section C which you originally had in the schematic. It's one of several reasons however that I don't use CAD for my schematics. I just do them by hand, then start laying out the board on CAD...

Bold mine. I agree 100% Garth, schematics shouldn't be forced in order to complete a PCB layout. I don't need a computer to attempt to do this for me. EPCB software is great in this regard!
A knowledgeable person has said on the IRC channel that a pure PCB layout is possible without any schematic. I'm going to have to devote some more time to figure this out with their help. Schematics are killing my free time this past day!

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PostPosted: Tue Feb 17, 2015 11:11 pm 
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ElEctric_EyE wrote:
...I'll have to start learning all the other schematic related BS...

The learning curve is not too steep with KiCAD. A few bugs here and there, but nothing serious. I like it.

Aslak3 wrote:
...A problem with linking the schematic capture and PCB design together comes when programmable logic is used. One of the big advantages with PL (especially as the devices get bigger and bigger) is that the pin routing on the logic pins should be guided by the PCB design not a logical representation (ie. the schematic). As soon as the schematic is drawn that links pins together, the PCB must be made to link these pins and only these pins. Do any PCB/schematic tools out there (which are free or cheap) allow you to express the schematic in such a way that the route can be satisfied by using "any" logic pin? This would certainly make my life easier; I wouldn't have to draw up the schematic in such a way that I end up drawing the physical layout of the FPGA, just so I can get the pin mapping correct from a physical pin-layout perspective...

Please let us know how you get on with KICAD.

I was able to do a preliminary 6 layer board layout and the vias appear to be locked in this time. Before using the schematic tool, the vias had no NETs assigned. So every time I did a 'refresh' by filling the zone on the inner layers, the clearance in the inner layers disappeared and all vias appeared shorted.

To answer your question Aslak3 (and mine too), it appears you can route individual signal pins in the KiCAD PCBnew tool, but make sure to turn off DRC checker in the upper left toolbar when routing traces.
For the power and ground vias, you do need to have a schematic as a first step. This allows a via NET to be assigned to the proper layer.
For my quickie test, I started with the power supply input schematic which has some ferrite beads and caps for some various power NETs, and a 1.2V VReg for the FPGA core.
Then go on to assign the powers and grounds for all the other IC's in a project.
Assign the PCB footprints with CvPcb in the schematic editor.
Start the PCBnew tool, and click the 'Read Netlist' button. Then you see your devices with all the ratsnest. The ratsnest disappears with I started running tracks from pins to the power/ground vias on all the IC's.

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