Ok, I wanted to see how you would progress before I told you how I program the 65Org16.b softcore using the FPGA blockRAM. Indeed, this is how one can do it from scratch step by step, but I use Bitwise's As65 on a WinXP SP3 machine and using a tool Arlet provided. I will provide them here I hope he doesn't mind!
1) Download As65:
http://www.obelisk.demon.co.uk/files/65016.zip2) In the 65o16 folder, open the Makefile and modify it into something like mine below. I modified the extension from .ink to .txt so I could upload it. Change it back to .ink.
3) Download Arlet's bin2hex & bin2coe and place them inside the 65O16 folder. I modifed the extension from .exe to .txt. Change them back to .exe.
4) Download the 65Org16.b Macro's from
Github and paste them into the boot.asm file like in my example below.
5) Write your assembly, open up the command prompt window, change directory to the 65O16 folder and type in 'nmake'. This will create the boot.hex & boot.coe files needed for Xilinx ISE.
I only perform the last step when writing my programs. Everything else is one time only!
EDIT: I almost forgot the Verilog code for the ROM has to include the location like such. You can see ISE only uses the .coe file, but alot of EEPROM programmers use the .hex:
Code:
//4Kx16 ROM, i.e. initialized FPGA blockRAM
`timescale 1ns / 1ps
module ROM ( input clk,
input rst,
input [11:0] addr,
output reg [15:0] dout
);
reg [15:0] RAM [4095:0];
initial $readmemh("C:/65016PVBRAM2/boot.coe",RAM,0,4095);
always @(posedge clk)
if (rst)
dout <= 0;
else
dout <= RAM[addr];
endmodule
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