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PostPosted: Fri Jul 27, 2018 1:29 pm 
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Before I start...my apologies for my long rambling. Sometimes my mind just pours out on the keyboard...good or bad. lol


So, I have a Mojo V3 FPGA development board and I've gotten a few VGA signals in the past. I also have an ATF1504 CPLD (thinking about using the ATF1508) that I wanted to use for glue logic and possibly VGA.

I'm just learning programmable logic so I have a ways to go. But my earlier tests with the FPGA board were promising (using VHDL).

I'm curious on what you guys think. I'd like the following in my design:

1) 65C816 (4-8 MHz depending on complexity)

2) VGA
640x480 for 80 column mode.
320x240 "fat pixels" for 40 column / color modes (think C64 style graphics)
Direct access like the Apple IIe.

3) 512K RAM (maybe another 512K for video RAM)

4) 128K ROM (maybe more??)

5) Video must be generated in parallel with the CPU access (like the Apple II does) so that maximum video access is possible. I know this is more complicated with the '816 (which is why I have you lovely people to offer advice. :-D )

Now, I know this is a complicated system. But keep in mind I don't care if it takes another 25 years. I'm in no hurry. This is the computer I want. :-D

So back to my question....I don't think the 1508 could handle all of this. So I was thinking of using TWO of them. One for glue and smaller functions and the other for video. But if I'm going to have two large CPLD's (and I have a LITTLE bit of experience with FPGA's), why not just use an FPGA and be done with it?

However, I don't want to use some giant FPGA that I cannot solder by hand (no reflow). My soldering skills are pretty good but my eyes are going to put TQFP-100 at the upper limit. Maybe TQFP-144 if I get a good microscope. But that's pushing it.

I'm not about creating a Woz design that uses minimal chips. But I don't want to be wasteful at the same time.

What do you guys think? FGPA for VGA and CPLD for glue? FPGA for it all? 2-3 CPLD chips?

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PostPosted: Fri Jul 27, 2018 1:46 pm 
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The obvious differences are that generally, CPLDs are smaller in capacity and FPGAs are larger. Having something with too much capacity isn't a problem, but counting against FPGAs are higher cost, usually needed a serial EEPROM for the bitstream, and having a fraction of a second delay at powerup before the thing behaves as you programmed it to.

For sure, evaluate what kind of package you're happy to solder, depending on tools and experience. Or whether you demand a socketable package.

And then it comes down to pin counts - that's probably the main thing, because part count and board area probably isn't a big concern for a hobby design, unless your board is just under some size threshold for a big price bump.

It's worth noting that you can work out pin counts from your paper design, and you can see if your project fits in a given part using free tools, all before you need to spend money.

But if I had enough design to mop up that it needs an FPGA, and if the FPGA has the pin count and capacity to mop up everything, I don't think I'd add a CPLD just to keep the functions separate.

Is one FPGA better or worse than two CPLDs? I think it depends on pin counts, part costs, and board area, all else equal.


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PostPosted: Fri Jul 27, 2018 1:56 pm 
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That's good advice.

I don't shy away from surface mount. But I've only designed 2 layer boards in KiCad. My fear is picking some large TQFP-144 and realizing I need a 4 layer board or more. I actually thought about going the extra mile with 4 layer too. Remember, I have plenty of time here.

I really think I could handle TQFP-100 with no issue. But if I'm going for broke here, maybe I go ahead and try TQFP-144 and the biggest FPGA in that package. Then I have the 5V to worry about. Which was another reason I love the 1508.

Finally, I was thinking of going 3v3 all the way since 4-8 MHz would be my top speed (I don't think I'm good enough to go beyond 8 MHz). Then I could just use level converters for my I/O ports to handle the 5V external devices I want to use.


**EDIT**

This FPGA looks pretty good:

https://www.mouser.com/ProductDetail/La ... B0TOMQE%3d

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PostPosted: Fri Jul 27, 2018 2:29 pm 
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I see that one has on-chip flash, which is a welcome simplification.


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PostPosted: Fri Jul 27, 2018 2:30 pm 
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Looks to have a small amount of RAM too (block RAM???) that could hold a few scanlines for rendering sprites in a later date.

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PostPosted: Fri Jul 27, 2018 2:33 pm 
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Yes, I think most FPGAs have on-chip RAM, often dual-ported, which can come in very handy for ROM, for microcode, for video. Some have multipliers, which is useful for sound synthesis. (That said, Hoglet managed to fit a SID model in an FPGA which lacks multipliers - it just took a lot of LUTs.)


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PostPosted: Fri Jul 27, 2018 2:36 pm 
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That's pretty cool!

For sound, I may use a Propeller since it has great SID emulation support. The drawback is that it couldn't handle 4-8 MHz direct access. So I'd have to wait-state or something to get audio data to it. But, the ability to emulate 4-6 SID chips in one package is pretty sweet.

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PostPosted: Fri Jul 27, 2018 11:15 pm 
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I think the big advantage of the CPLD is being 5v, but if you're happy with 3.3v then the FPGA has a lot of advantages.

I made a breadboard system with a 65C02 and an ATL1508. It worked really well but I built the ROM into the CPLD and I was running out of space. The advantage was I could easily download the code over the USB programmer, but it did limit what I could do.

One idea I'm working on is to load the ROM from the FPGA FLASH chip. Most of the time there is a lot of spare capacity in the FLASH, so some FPGA code at startup time can be used to initialise the RAM with the boot code. This leads to simpler address decoding and could avoid speed issues if your ROM is slower than your RAM. It also makes programming easier as you can just download new ROM using the same method as you program the FPGA.

Depending on what you want to do, pin count can be an issue. I was thinking of a design that used SDRAM, so the CPU and the RAM would need to go through the FPGA, that's something like 70 pins used already. On a 144 pin FPGA, with video out as well, that only left about 20 pins for other functions. I guess that's quite a big design, but you can use up all the pins without too much trouble, depending on what you want to add. The big advantage was I'd have a full 16MB RAM coming from just one chip.

My design has HDMI out, it's a little more complex, but if you have a FPGA it's almost as easy and it gives you a lot more options for monitors these days. The code is basically the same for a start as you implement the same VGA type output and then put it through the HDMI interface.

But then again, I'm continually struggling with trying not to make this over-complex. As you can see I may be losing that battle.


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PostPosted: Sat Jul 28, 2018 9:08 pm 
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For direct access another possibility is the solution I've been doing for my VGA project, which uses a Max V CPLD. I am routing VRAM accesses directly to the CPLD, which is in turn connected to 128k of 15ns static RAM. Internally, the CPLD does the VGA reads on one half of the 40 ns pixel clock and then performs any pending CPU reads/writes on the other half. As far as the CPU is concerned it's just a 40 ns RAM chip that happens to generate video off of its contents. Plenty fast enough for 8 MHz and even with all the address and data lines it's still well under 100 pins.


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PostPosted: Sun Jul 29, 2018 9:46 am 
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cbmeeks wrote:
...
However, I don't want to use some giant FPGA that I cannot solder by hand (no reflow). My soldering skills are pretty good but my eyes are going to put TQFP-100 at the upper limit. Maybe TQFP-144 if I get a good microscope. But that's pushing it.


Ignoring everything else, the above is exactly the reason my MAXI09 machine uses an Altera FLEX10K. The smallest one, the EPF10K10, is available in PLCC84 so you can assemble it with regular through-hole (via a PLCC socket) soldering.

The device has 576 LEs, a trivial amount compared to "proper" FPGAs, but on the other hand it is 5V and has 3 by 2048 bits of RAM. I use mine (for pin reasons I use two) for: holding a boot loader, memory paging, a bus mastering DMA Controller, simple SPI host, tone generator, IDE high byte latch, priority encoded interrupt routing, plus the usual address decoding etc. I have one spare and was thinking about implementing a VGA controller with it, strangely enough.

Of course these parts are completely obsolete, but that does not bother me. I got mine from UTSource. You will need a config flash as well, an EPC2 in PLCC20.

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PostPosted: Mon Jul 30, 2018 2:02 am 
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I have 80x30 16-color text mode running with a 128 Macrocell CPLD but it requires an external shift register, mux, rom etc

If you go for an FPGA you likely won't have to worry about running out of resources & will get the benefit of free dual-ported vram courtesy of your FPGA's Block RAM.
This will also mean you'll get to experiment a lot more with different things like adding a Blitter etc later if you want.


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PostPosted: Mon Jul 30, 2018 2:34 am 
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Aslak3 wrote:
cbmeeks wrote:
...
Of course these parts are completely obsolete, but that does not bother me. I got mine from UTSource. You will need a config flash as well, an EPC2 in PLCC20.


This is interesting, Anything special needed to program the flash? Or just the usual Altera JTAG?


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PostPosted: Mon Jul 30, 2018 8:40 am 
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LIV2 wrote:
This is interesting, Anything special needed to program the flash? Or just the usual Altera JTAG?


No, nothing special; USB Blaster JTAG. My board has 3 devices on the chain, the two FPGAs and the config flash.

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PostPosted: Mon Jul 30, 2018 10:18 am 
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BTW I've updated my thread here with my latest progress for my own CPLD based video adapter
viewtopic.php?f=4&t=4994&start=15#p61682

Aslak3 wrote:
LIV2 wrote:
This is interesting, Anything special needed to program the flash? Or just the usual Altera JTAG?


No, nothing special; USB Blaster JTAG. My board has 3 devices on the chain, the two FPGAs and the config flash.


Neat, I'm definitely going to pick some of these up then!


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