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 Post subject: Generating Video Signals
PostPosted: Thu Mar 24, 2011 4:05 am 
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There are a couple of resources for generating video signals on the web. If you know of any others, they would be appreciated.

http://www.rickard.gunee.com/projects/v ... /howto.php

http://dangerousprototypes.com/2011/03/ ... and-fpgas/

http://www.pyroelectro.com/tutorials/nt ... with_vhdl/

http://en.wikipedia.org/wiki/NTSC
http://en.wikipedia.org/wiki/PAL
http://en.wikipedia.org/wiki/ATSC_(standards)

Dangerousprototypes.com is working on an inexpensive CPLD board to practice on for $15 but they say that right now it is just displaying text right now. Their board is being tested right now.

As far as microcontrollers being used to make video, the ones I know about are the Parallax Propeller and their second version of the Propeller, Fuzebox, Xmos, Amani 64, and there are others. The Gameduino impressed me the most. Keep in mind that projects are going to continually come and go. You have to consider cost, ease of use, and what you eventually want out of it. You don't want to keep getting sidetracked so you might want a product with staying power.

The other alternatives are small and low cost LCDs but that is a different subject.


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PostPosted: Thu Mar 24, 2011 5:40 am 
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Some more pointers and thoughts:

Bitwise posted some time ago a link to a Xess appnote.

Those devboards which have a VGA connector maybe have a corresponding appnote or tutorial for putting a controller into the FPGA.

A controller small enough for CPLD implementation is interesting, of course. I don't know if the 6845 in HDL is small enough to fit. André has a page about 6845.

Arlet has published verilog for a video timing generator.

The AVGA thread mentions using this AVR-based board as a graphics subsystem.

Gameduino is more of a graphics subsystem for games: it does video but also sprites and has a CPU for things like line-drawing or blitting. The site also has notes on a two-resistor NTSC (composite video) output

To summarise some terminology, as I understand it:
    a timing generator needs a frame buffer or character generator setup
    a video output circuit creates the right levels and pinout and brings together the pixel data and the sync signals.
    a graphics subsystem includes timing generator, frame buffer and video output circuit
    a smart LCD acts like an 8-bit peripheral and is pixel-addressable


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PostPosted: Thu Mar 24, 2011 2:27 pm 
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I stumbled across a new PIC chip (24FJ256DA210) that contains an embedded graphics generator, CLUT and 96K of RAM (enough for QVGA 320x240 @ 8 bpp) that looks interesting. Slightly higher resolutions and colour depths are possible if integrated with an external RAM. The graphics controller can do some simple blitter functions, character drawing and image decompression.

Its designed to drive a LCD screen directly but looks like it could be made to output VGA compatible signals. No sprites but you would have almost 100% of 16 MIPS to program anything like that with.

The chip runs at 3V3 but the pins for I2C and SPI are 5V tolerant. The 100pin chips have an EPSP interface that in slave mode would allow them to attached as a 4 addressable memory locations on an 8-bit data bus - all control signals would have to be 3V3 and you couldn't have external RAM.

Not bad for less that $8.

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PostPosted: Fri Mar 25, 2011 12:48 am 
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BigEd wrote:
Those devboards which have a VGA connector maybe have a corresponding appnote or tutorial for putting a controller into the FPGA...


Very true! And it does require more intelligent searching, not just a Google type search.

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PostPosted: Fri Mar 25, 2011 3:30 pm 
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Hackaday has a category for video hacks:

http://hackaday.com/category/video-hacks/

There is an Arduino display but I only saw black and white on the video. I think they are helpful in learning in how to deal with making your own video signals:

Hackvision is build-your-own retro game

http://hackaday.com/2010/10/24/hackvisi ... etro-game/

I also need the time to post about some parts that could be useful.


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PostPosted: Mon Mar 28, 2011 1:48 am 
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I asked how to make a framebuffer from the creator of the Gameduino and he gave me this link to get started.

http://www.fpga4fun.com/PongGame.html


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PostPosted: Mon Mar 28, 2011 8:22 am 
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There's still this one http://www.6502.org/users/andre/hwinfo/ ... osite.html how to make a composite signal from the 6545 CRTC output.

André


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 Post subject: Re:
PostPosted: Thu Oct 26, 2017 3:23 pm 
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BitWise wrote:
I stumbled across a new PIC chip (24FJ256DA210) that contains an embedded graphics generator, CLUT and 96K of RAM (enough for QVGA 320x240 @ 8 bpp) that looks interesting. Slightly higher resolutions and colour depths are possible if integrated with an external RAM. The graphics controller can do some simple blitter functions, character drawing and image decompression.

Its designed to drive a LCD screen directly but looks like it could be made to output VGA compatible signals. No sprites but you would have almost 100% of 16 MIPS to program anything like that with.

The chip runs at 3V3 but the pins for I2C and SPI are 5V tolerant. The 100pin chips have an EPSP interface that in slave mode would allow them to attached as a 4 addressable memory locations on an 8-bit data bus - all control signals would have to be 3V3 and you couldn't have external RAM.

Not bad for less that $8.


I know this is an old topic, but this intrigued me. I might be interested in investigating this but PIC programming isn’t my area exactly. I’m working on a project and here’s basically what I want.

A linear 256 color (even 64 color would be fine) bitmap mode
8px8p tile based display modes with multicolor support
Sprites (ideally 16x16 with 16 colors per sprite)
Both horizontal and vertical scroll support window based

I don’t need any vector or line draw features, though that would be nice.

I think something like this could be great for lots of 6502 based projects as well as other home brews.
Personally I would pack it all onto a little card that can be connected either card edge or with header pins. Make so that it has an 8 bit exposed data bus, a few address lines, an active low CS line, RW line, and an IRQ line. Probably RESET as well. If anyone finds this intriguing PM me.

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PostPosted: Fri Oct 27, 2017 7:28 pm 
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Check out http://www.opencores.org

The site has a number of Video, VGA and DVI cores in either VHDL or Verilog.

Update: One of the cores I learnt from was TinyVGA. I basically used that to understand how to make a VGA output:

1) You need to choose a resolution and look up parameters. Here are a few.
2) Pixel clock must be generated. Many CPLD's have an internal clock that works just fine. For high accuracy you may want an external clock as they tend to give better images.
3) Generate sync signal based on a pixel counter (using pixel clock edges). VGA is based on the old CRT electron beam scanning, so you have to think of it as scanning a single line at a time (in horizontal direction). From the parameters you can see when to set sync LOW or HIGH (for +sync its HIGH most of the time and LOW between end of front porch and sync end, for -sync its the opposite).
4) Count horizontal lines and generate vertical sync according to parameters.
5) Generate RGB signal. The number of bits you choose is to your liking. More than 5-6 bits per color without an external VGA chip is wasted time as you will loose the resolution in noise when using direct CPLD output lines. The simplest it 1 bit per color as the PONG game: http://www.fpga4fun.com/PongGame.html or like the project here, 4-bits per color.

The easiest way to generate RGB signal in the CPLD is to use 1 byte per pixel per color. If you for example have 1280x1024 at 60Hz (108MHz pixel clock) it will require 3*108MByte/s memory access. E.g. a memory bus of 324*8=1992Mbit/s. With fewer bitplanes you can get away with less. For a CPLD with internal memory this is usually not a problem since you can have a bus of 16, 24 or 32 bit width. But it needs to support the pixel clock access speed.

Happy coding! :mrgreen:


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 Post subject: Re: Re:
PostPosted: Mon Oct 30, 2017 9:00 pm 
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KhanTyranitar wrote:
A linear 256 color (even 64 color would be fine) bitmap mode
8px8p tile based display modes with multicolor support
Sprites (ideally 16x16 with 16 colors per sprite)
Both horizontal and vertical scroll support window based

I don’t need any vector or line draw features, though that would be nice.

I think something like this could be great for lots of 6502 based projects as well as other home brews.
Personally I would pack it all onto a little card that can be connected either card edge or with header pins. Make so that it has an 8 bit exposed data bus, a few address lines, an active low CS line, RW line, and an IRQ line. Probably RESET as well. If anyone finds this intriguing PM me.


A Parallax Propeller micro-controller makes 64 color VGA almost trivial. You should check out what that $8 chip can do. :-)

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PostPosted: Thu Nov 02, 2017 9:26 pm 
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It’s possible to fit a VGA controller in a 64 macrocell CPLD (Plus a ROM, Shift register and some RAM) I have some VHDL for it but am on vacation at the moment

I’m interested in the dangerous protos thing you mentioned, you got a link?


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PostPosted: Fri Nov 03, 2017 12:40 am 
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The guy who works on the Flea Projects (Flea86, FleaFPGA, etc) was saying you can generate VGA with an SPI SRAM. You write the data to the chip and then apparently there is a mode where every clock pulse to the chip spits out the next set of bits in the stream. (I have no experience with this myself though).

SPI SRAM: http://www.mouser.com/ds/2/268/25142A-47786.pdf


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PostPosted: Fri Nov 03, 2017 1:43 am 
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Thanks, Druzyek. For another chip with intriguing video possibilities -- one with both SPI and parallel interfaces -- see AldoBrasil's post here.
Quote:
Its a 128kb SRAM that happens to have a internal video generator and a blitter. It does 1bit SPI, 2bit SPI, 4bit SPI and 8 bits parallel interface. It uses YUV color space and can do arbitary number of bits per pixel and arbitrary resolution, provided everything fits in memory. I dont believe there is something easier to get video out of a 8bit microprocessor than this chip.

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PostPosted: Wed Jan 03, 2018 6:25 pm 
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LIV2 wrote:
It’s possible to fit a VGA controller in a 64 macrocell CPLD (Plus a ROM, Shift register and some RAM) I have some VHDL for it but am on vacation at the moment


Are you still on vacation? :-D

I would be interested in seeing the VGA/CPLD code you have.

Thanks!

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PostPosted: Tue Feb 27, 2018 2:55 am 
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One thing I did for my xbox vdp was using a lookup-table. At 28.63636mhz, which is 8 times the NTSC frequency, i pre-calculated the phases for all 512 color combinations * 8 states of the phase. Perhaps a bit overkill but it worked :-)
You can get away with a lot less depending on the number of colors you want to support. In my case that was RGB333. With the AD723 now going for about $10, it's definitely worth looking into other solutions!

Yvo


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