Hi Ruud
there's an accessible story about slices and so on
here.
(Basically, an FPGA of a given size has some number of slices, which are all the same, and probably some RAM blocks and multipliers. In the FPGAs we're talking about, a slice has 2 bits of storage (flops), 2 muxes and 2 general 4-input logic units. These logic units are called LUTs because they are actually look-up tables. In fact you can use them for storage although they are not as dense as the RAMs)
To an approximation, all that matters is whether your design fits on your FGPA or not. But if your core needs to share the FPGA with some interesting other system logic, the fewer slices it uses the more room will be left.
There's probably a weak correlation that bigger designs would be slower, unless very carefully arranged otherwise.
I find it interesting that the different designs have such different numbers of flops (storage elements) because they are all implementing 6502 with the known number of programmer visible registers. The differences must come from the internal (hidden) registers they have, and the amount of control state. For example, if you had registered every output of a PLA-like module, that would be 132 extra flops. (The real 6502 doesn't do that)
Hope this helps
Ed
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