Been under the weather last 2 weeks... But I've made some progress.
Recently, I've been looking up info on pseudo-random number generators, one which I could put inside the FPGA and simulate changing variables to test certain portions of my 65Org16 software. We've talked about the subject for
true RNG's
here, but this would have required external circuitry as far as I'm aware. Although, I have read somewhere on Xilinx forums that FPGA inputs could be setup for Schmitt-trigger type...
So this morning I've added a PRBS (Pseudo Random Bit Sequencer) to the project, that has a 16-bit output, I found
here. It does truly look random as in the pic below I am "clearing" the screen with the data read from the PRBS and then I sent the text file (HxD license file) over the br@y terminal @256Kbaud. Sorry about the pic compression, photobucket does this auto. It truly does not do the TFT justice! Those are 8x8 characters on a 5.7" 800x480 TFT.
As you can see, the colors look pretty random (the display is only seeing the lower 8bits of the databus). One interesting observation: The PRBS active high reset is tied low, so one would figure it is always spitting random #'s after power-up. But when I repeatedly reset the CPU, and the CLRSCR routine clears the screen with the random numbers, the randomness is always the same. I would have expected this if I had tied the PRBS reset to the cpu reset...
For the rest of today, I am adding the 8x8 DOS font that Daryl very kindly shared so it sits next to the C-64 font pixel data for a better usage of BlockRAM. I'm not going to waste my time at this point inputting a 16x16 charset pixel by pixel. But the font bit selector is there, and so is the preserved BlockRAM.
Maybe tomorrow I will attack the I2C core again as it is fairly straightforward, to try to program the DS1085s.
When I feel up to par again, I will be back at integrating HESMON...