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 Post subject: Re: GAL Address Decoder
PostPosted: Sun Apr 12, 2015 8:42 pm 
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I wrote:
They're unbelievably fast -- jusy one cycle
BigDumbDinosaur wrote:
Unfortunately, Jeff's clever little trick won't work with the 65C816, since it has no undefined opcodes. :cry:
Yes, as noted I meant the 'C02. But an '816 version looks highly doable, using the 2-byte, 2-cycle WDM opcode -- $42.

The 'C02 version has an edge for speed, but, at two cycles, the '816 version would still be fast. Both versions allow for IO without saving a register or even loading one -- back to the point Peter raised. There's time savings associated with that as well.

-- Jeff

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 Post subject: Re: GAL Address Decoder
PostPosted: Mon Apr 13, 2015 1:46 am 
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Dr Jefyll wrote:
But an '816 version looks highly doable, using the 2-byte, 2-cycle WDM opcode -- $42.

Especially given that it seems unlikely at this point in time that WDM will be turned into a useful instruction.

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 Post subject: Re: GAL Address Decoder
PostPosted: Mon Apr 13, 2015 7:46 pm 
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"Won't work" sounded clear enough -- but suddenly you seem OK with the idea. Is there an "oops" written between the lines?

I agree it's unlikely any chip manufacturer will introduce a 65xx that alters the behavior of the WDM opcode. So, it's hardly a problem if we usurp $42 for our own diabolical purposes! :twisted:

J. :wink:

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 Post subject: Re: GAL Address Decoder
PostPosted: Tue Apr 14, 2015 6:15 am 
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Dr Jefyll wrote:
"Won't work" sounded clear enough -- but suddenly you seem OK with the idea. Is there an "oops" written between the lines?

No "oops." Unlike the 'C02, which has an "assortment" of "free" NOPs of varying qualities, WDM is a one-trick pony, as it were. It won't work anything like what you conjured for the 'C02.

Quote:
I agree it's unlikely any chip manufacturer will introduce a 65xx that alters the behavior of the WDM opcode. So, it's hardly a problem if we usurp $42 for our own diabolical purposes! :twisted: :wink:

I could see where programmable logic could be looking for $42 on D0-D7 when VDA && VPA is true and then do something if $42 is present, perhaps by examining the signature byte for further direction.

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 Post subject: Re: GAL Address Decoder
PostPosted: Wed Apr 15, 2015 8:09 pm 
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BigDumbDinosaur wrote:
No "oops."
Well, that's irksome, but I remain equable. We're lucky to have a place like 6502.org -- and the reason we come here is because we share an interest and like to hang out together! So that's all positive. As for my concern, maybe you'll humor me for a moment...

Imagine, any of you, a list of three or four names, identifying some of the forum members you esteem most highly, and whose words you trust. Then assign each of them an informal rating for courtesy and clarity regarding mistakes and corrections. (If you're curious you could even use the forum's Search function for a quick scan of an individual's posts, seeking words like oops, thanks, boo-boo, mistake and so on.) My drift is that there'll be a pattern: the members who qualified for the list will also tend to rate highly for errata courtesy. And that's not a coincidence. Ready acceptance of corrections is one of the traits that earned them their credibility.

With due respect, BDD, you're much harder to pin down, and accept far fewer corrections, than the leaders on my list, for example. It's unlikely you make far fewer mistakes, so I'm left with the notion you're just far more reticent regarding corrections. This thread is certainly not the only example, but it illustrates well enough. Of course it's a given that we all suffer occasional oversights & boo-boos -- aka incidents of "mental flatulence"! :) They can be embarrassing, even humorous. But they are also a fact of life, and a perfectly ordinary occurrence. IMO the best response is to own up so the thing can be quickly reconciled and forgotten. What will get remembered is if you (or anybody) doesn't allow those things to happen. It attracts our attention, and puts us on alert re the individual's credibility.

BigDumbDinosaur wrote:
It won't work anything like what you conjured for the 'C02.
Alright, I'll be happy to talk about differences and similarities in a moment. First let's notice there's a shift in the topic, as you're no longer complaining the idea won't work. The topic shift, and doubt over what happened to your original stance, are the sort of thing that adds fuel to the "hard to pin down" suggestion. You can forestall the criticism by being specific when you change tacks. BTW I haven't asked you yet about your (off-the-cuff?) conclusion that the '816 has no opcodes suitable for the I/O idea being discussed, but if we get there hopefully it'll be gracefully.


Okay, on to differences and similarities. Both versions ('C02 and '816) are hardware retrofits to the instruction set that perform high-speed I/O without requiring use of a CPU register. Both can use discrete or programmable logic, and both are novel in that they don't require a portion of the address space -- it isn't memory-mapped I/O. Both versions attach meaning to certain instructions that are not normally used. As we'd expect, the 'C02 version takes advantage of instructions not normally used with the 'C02. The '816 version exploits instructions not normally used with the '816.

BigDumbDinosaur wrote:
perhaps by examining the signature byte for further direction.
Yup -- you've touched on the answer right there. The instruction has eight don't-care bits that can be harnessed.

BigDumbDinosaur wrote:
Unlike the 'C02, which has an "assortment" of "free" NOPs of varying qualities, WDM is a one-trick pony, as it were.
It may help to think of WDM as a category with 256 instructions. However you think about it, what matters is they all have the same behavior, and the don't-care bits can easily be accepted by the hardware -- they are very tidily presented. So, to begin, we examine the first 8 bits of the 16-bit instruction. If those bits equal 01000010 (binary) then the mechanism triggers, capturing the don't-care bits so they can be used in support of those diabolical purposes I mentioned on Monday. (For example, you could easily arrange for the bits to specify a write to a '259 latch. How you interpret the captured bits is something you can custom-tailor for your own fiendish needs! :) )

As for 'C02 unused opcodes, you're right in saying some have irregular qualities (not to mention helter-skelter placements in the opcode map). But as a simple expedient we just ignore the irregular ones, and only make use of the ones that lie in column 3 and column B of the map -- ie; those whose LS three bits are 011 (binary). These unused opcodes all have the same behavior. And their compact grouping (all in columns 3 and B) makes for a very tidy presentation once again. So, first we examine the LS 3 bits of the 8-bit instruction. If those bits equal 011 (binary) then the mechanism triggers. The five don't-care bits get captured, and you're good to go with your '259 or whatever.

The I/O idea already has a thread of its own, so probably it's best if any further comment/explanations about it go there.

-- Jeff

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 Post subject: Re: GAL Address Decoder
PostPosted: Thu Apr 16, 2015 5:02 am 
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Dr Jefyll wrote:
BigDumbDinosaur wrote:
No "oops."
Well, that's irksome, but I remain equable. We're lucky to have a place like 6502.org -- and the reason we come here is because we share an interest and like to hang out together! So that's all positive. As for my concern, maybe you'll humor me for a moment...

Well, I don't know how to reply...so I won't.

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